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Conference Papers

2017

  • QuARK: Quality-configurable Approximate STT-MRAM Cache by Fine-grained Tuning of Reliability-Energy Knobs
    • Amir M. H. Monazzah, Majid Shoushtari, Seyed Ghassem Miremadi, Amir M. Rahmani, Nikil Dutt
    • IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED’17), 2017, Taiwan.
  • Empowering Autonomy through Self-awareness in MPSoCs
    • Nikil Dutt, Amir M. Rahmani, Axel Jantsch
    • IEEE International NEWCAS Conference (NEWCAS’17), 2017
  • Self-Awareness in Remote Health Monitoring Systems using Wearable Electronics
    • Arman Anzanpour, Iman Azimi, Maximilian Götzinger, Amir M. Rahmani, Nima TaheriNejad, Pasi Liljeberg, Axel Jantsch, and Nikil Dutt
    • DATE 2017

2016

  • SPARTA: runtime task allocation for energy efficient heterogeneous many-cores
    • Bryan Donyanavard, Tiago Mück, Santanu Sarma, Nikil Dutt
    • CODES+ISSS 2016
  • Conquering MPSoC complexity with principles of a self-aware information processing factory
    • Nikil Dutt, Fadi J. Kurdahi, Rolf Ernst, Andreas Herkersdorf
    • CODES+ISSS 2016
  • HAMEX: Heterogeneous Architecture and Memory Exploration framework
    • Kasra Moazzemi, Roger Chen-Ying Hsieh and Nikil Dut
    • RSP 2016
  • Approximation knob: power capping meets energy efficiency
    • Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt, Hannu Tenhunen
    • ICCAD 2016
  • HiCAP: Hierarchical FSM-based Dynamic Integrated CPU-GPU Frequency Capping Governor for Energy-Efficient Mobile Gaming
    • Jurn-Gyu Park, Nikil D. Dutt, Hoyeonjiki Kim, Sung-Soo Lim
    • ISLPED 2016
  • Co-Cap: energy-efficient cooperative CPU-GPU frequency capping for mobile games
    • Jurn-Gyu Park, Chen-Ying Hsieh, Nikil D. Dutt, Sung-Soo Lim:
    • SAC 2016
  • Cross-layer virtual/physical sensing and actuation for resilient heterogeneous many-core SoCs
    • Santanu Sarma, Tiago Muck, Majid Shoushtari, Abbas BanaiyanMofrad, Nikil Dutt
    • ASP-DAC 2016
  • Self-Awareness in Cyber-Physical Systems
    • Nikil Dutt, Nima Taherinejad
    • VLSI Design 2016

2015

  • Exploiting Partially-Forgetful Memories for Approximate Computing
    • Majid Shoushtari, Abbas BanaiyanMofrad, Nikil D. Dutt
    • Embedded Systems Letters 7(1): 19-22 (2015)
  • CARLsim 3: A user-friendly and highly optimized library for the creation of neurobiologically detailed spiking neural networks
    • Michael Beyeler, Kristofor D. Carlson, Ting-Shuo Chou, Nikil D. Dutt, Jeffrey L. Krichmar
    • International Joint Conference on Neural Networks 2015
  • Self-Aware Cyber-Physical Systems-on-Chip
    • Nikil D. Dutt, Axel Jantsch, Santanu Sarma
    • Proceedings of ICCAD 2015
  • Run-DMC: Runtime dynamic heterogeneous multicore performance and power estimation for energy efficiency
    • Tiago Muck, Santanu Sarma, Nikil Dutt
    • Proceedings of CODES+ISSS 2015
  • Memory-aware cooperative CPU-GPU DVFS governor for mobile games
    • Chen-Ying Hsieh, Jurn-Gyu Park, Nikil D. Dutt, Sung-Soo Lim
    • Proceedings of ESTImedia 2015
  • Protecting Caches Against Multiple Bit Upsets Using Embedded Erasure Coding
    • A. BanaiyanMofrad, M. Ebrahimi, F. Oboril, M. Tahoori, and N. Dutt
    • Proceedings of the IEEE European Test Symposium (ETS), [paper] [slides]
  • Models, Abstractions, and Architectures: The Missing Links in Cyber-Physical Systems
    • B. Balaji, M. Abdullah Al Faruque, N. Dutt, R. Gupta, Y. Agarwal
    • Proceedings of the 52nd Design Automation Conference (DAC), [paper] [slides]
  • SmartBalance: A Sensing-Driven Linux Load Balancer for Heterogeneous MPSoCs
    • S. Sarma, T. Muck, L. Bathen, N. Dutt, and A. Nicolau
    • Proceedings of the 52nd Design Automation Conference (DAC), [paper] [slides]
  • Orchestrating Application Quality and Energy Storage Management in Solar-Powered Embedded Systems
    • N. Dang, H. Tajik, N. Dutt, N. Venkatasubramanian, E. Bozorgzadeh
    • Proceedings of the 16th International Symposium on Quality Electronic Design (ISQED), [paper] [slides]
  • Thermal Sensor Allocation for SoCs Based on Temperature Gradients
    • J. Shin, F. Kurdahi, and N. Dutt
    • Proceedings of the 16th International Symposium on Quality Electronic Design (ISQED), [paper] [slides]
  • CyberPhysical-System-On-Chip (CPSoC) : A Self-Aware MPSoC Paradigm with Cross-Layer Virtual Sensing and Actuation
    • S. Sarma, N. Dutt, P. Gupta, N. Venkatasubramanian, and A. Nicolau
    • Proceedings of the IEEE/ACM Design, Automation and Test in Europe (DATE), [paper] [slides]
  • Cross-Layer Exploration of Heterogeneous Multicore Processor Configurations
    • S. Sarma, N. Dutt
    • Proceedings of the International Conference on VLSI Design (VLSID), [paper] [slides]

2014

  • On-Chip Self-Awareness Using Cyberphysical-Systems-On-Chip (CPSoC)
    • S. Sarma, N. Dutt, P. Gupta, A. Nicolau, N. Venkatasubramanian
    • Proceedings of the 12th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'14), [paper] [slides]
  • FPGA Emulation and Prototyping of a CyberPhysical-System-On-Chip (CPSoC)
    • S. Sarma, N. Dutt
    • Proceedings of the International Symposium on Rapid System Prototyping (RSP'14), [paper] [slides]
  • Quality-aware Mobile Graphics Workload Characterization for Energy-efficient DVFS Design
    • J. Park, C.Y. Hsieh, N. Dutt, S. Lim
    • Proceedings of the 12th International Symposium on Embedded Systems for Real Time Multimedia (ESTIMEDIA'14), [paper][slides]
  • Sense-making from Distributed and Mobile Sensing Data: A Middleware Perspective
    • S. Sarma, N. Venkatasubramanian, N. Dutt
    • Proceedings of the 51st Design Automation Conference (DAC'14), [paper] [slides]
  • Multi-Layer Memory Resiliency
    • N. Dutt, P. Gupta, A. Nicolau, A. BanaiyanMofrad, M. Gottscho, M. Namaki-Shoushtari
    • Proceedings of the 51st Design Automation Conference (DAC'14), [paper] [slides]
  • Power / Capacity Scaling: Energy Savings With Simple Fault-Tolerant Caches
    • M. Gottscho, A. BanaiyanMofrad, N. Dutt, A. Nicolau, P. Gupta
    • Proceedings of the 51st Design Automation Conference (DAC'14), [paper] [slides]
  • Minimal Sparse Observability of Complex Networks: Application to MPSoC Sensor Placement and Run-time Thermal Estimation & Tracking
    • S. Sarma, N. Dutt
    • Proceedings of the 17th Conference on Design, Automation and Test in Europe (DATE'14), [paper][slides]
  • GPGPU Accelerated Simulation and Parameter Tuning for Neuromorphic Applications
    • K. Carlson, M. Beyeler, N. Dutt, J. L. Krichmar
    • Proceedings of the 19th Asia and South Pacific Design Automation Conference (ASP-DAC'14), [paper][slides]

2013

  • A Reliable, Safe, and Secure Run-Time Platform for Cyber Physical Systems
    • S.S. Lim, E.J. Im, N. Dutt, K.W. Lee, I. Shin, C.G. Lee, I. Lee
    • Proceedings of the 6th International Conference on Service-Oriented Computing and Applications (SOCA'13), [paper] [slides]
  • ARGO: Aging-aware GPGPU Register File Allocation
    • M. Namaki-Shoushtari, A. Rahimi, N. Dutt, P. Gupta, R. K. Gupta
    • Proceedings of the 11th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'13), [paper][slides] [poster]
  • Design Space Exploration and Parameter Tuning for Neuromorphic Applications
    • K. D. Carlson, J. M. Nageswaran, N. Dutt, J. L. Krichmar
    • Proceedings of the 11th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'13), [paper] [slides]
  • Biologically Plausible Models of Homeostasis and STDP: Stability and Learning in Spiking Neural Networks
    • K. Carlson, M. Richert, N. Dutt, J. L. Krichmar
    • Proceedings of the International Joint Conference on Neural Networks (IJCNN'13), [paper] [slides]
  • REMEDIATE: A Scalable Fault-tolerant Architecture for Low-Power NUCA Cache in Tiled CMPs
    • A. BanaiyanMofrad, H. Homayoun, V. Kontorinis, D. Tullsen, N. Dutt
    • Proceedings of the 4th International Green Computing Conference (IGCC'13), [paper][slides]
  • Reliable On-Chip Systems in the Nano-Era: Lessons Learnt and Future Trends
    • M. Shafique, L. Bauer, N. Dutt, P. Gupta, J. Henkel, S. Nassif, M. Tahoori, N. Wehn
    • Proceedings of the 50th Design Automation Conference (DAC'13), [paper] [slides]
  • VAWOM: Temperature and Process Variation Aware WearOut Management in 3D Multicore Architectures
    • H. Tajik, H. Houmayoun, N. Dutt
    • Proceedings of the 50th Design Automation Conference (DAC'13), [paper][slides] [poster]
  • Vision-inspired Global Routing for Enhanced Performance and Reliability
    • J. Shin, N. Dutt, F. Kurdahi
    • Proceedings of the 14th International Symposium on Quality Electronic Design 2013 (ISQED'13), [paper][slides]
  • Modeling and Analysis of Fault-tolerant Distributed Memories for Networks-on-Chip
    • A. BanaiyanMofrad, G. Girao, N. Dutt
    • Proceedings of the 16th Conference on Design, Automation and Test in Europe (DATE'13), [paper][poster]
  • Variability-Aware Memory Management for Nanoscale Computing
    • N. Dutt, P. Gupta, A. Nicolau, L. Bathen, M. Gottscho
    • Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC'13), Invited Paper, [paper] [slides]
  • VISA Synthesis: Variation-Aware Instruction Set Architecture Synthesis
    • Y. Hara-Azumi, T. Azumi, N. Dutt
    • Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC'13), [paper][slides]

2012

  • Cross-layer Virtual Observers for Embedded Multiprocessor System-on-Chip
    • S. Sarma, N. Dutt, N. Venkatasubramanian
    • Proceedings of the 11th Workshop on Adaptive and Reflective Middleware (ARM'12), [paper] [slides]
  • An Advanced Course Design for Mobile Embedded Software through Android Programming
    • G. Jeong, D. Kang, S. Lim, N. Dutt
    • Proceedings of the 2012 Workshop on Embedded and Cyber-Physical Systems Education (WESE'12), [paper][slides]
  • AVid: Annotation Driven Video Decoding for HybridMemories
    • C. Stancu, L. Bathen, N. Dutt, A. Nicolau
    • Proceedings of the 10th International Symposium on Embedded Systems for Real Time Multimedia (ESTIMEDIA'12), [paper] [slides]
  • A Novel NoC–based Design for Fault-tolerance of Last-level Caches in CMPs
    • A. BanaiyanMofrad, G. Girao, and N. Dutt
    • Proceedings of the 10th International Symposium on Hardware/Software Codesign and System Synthesis, (CODES+ISSS'12), [paper][slides]
  • ViPZonE: OS-Level Memory Variability-Driven Physical Address Zoning for Energy Savings
    • L. Bathen, M. Gottscho, N. Dutt, P. Gupta, A. Nicolau
    • Proceedings of the 10th International Symposium on Hardware/Software Codesign and System Synthesis, (CODES+ISSS'12), [paper][slides]
  • LRCG: Latch-based Random Clock-gating for Preventing Power Analysis Side-channel Attacks
    • K. Tanimura, N. Dutt
    • Proceedings of the 10th International Symposium on Hardware/Software Codesign and System Synthesis, (CODES+ISSS'12), [paper][slides]
  • Software Controlled Memories for Scalable Many-Core Architectures
    • L. Bathen, N. Dutt
    • Proceedings of the 18th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'12), Invited Keynote Paper, [paper] [slides]
  • PTL: PCM Translation Layer
    • Z. Shao, N. Chang, N. Dutt
    • Proceedings of the 2012 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'12), Invited Paper, [paper] [slides]
  • HaVOC: A Hybrid-Memory-aware Virtualization Layer for On-Chip Distributed ScratchPad and Non-Volatile Memories
    • L. Bathen, N. Dutt
    • Proceedings of the 49th Design Automation Conference (DAC'12), [paper][slides]
  • Meta-Cure: A Reliability Enhancement Strategy for Metadata in NAND Flash Memory Storage Systems
    • Y. Wang, L. Bathen, Z. Shao, N. Dutt
    • Proceedings of the 49th Design Automation Conference (DAC'12), [paper] [slides]
  • Spiking Neuron Model of Basal Forebrain Enhancement of Visual Attention
    • M. Avery, J. Krichmar, N. Dutt
    • Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN'12), [paper] [slides]
  • 3D-FlashMap: A Physical-Location-Aware Block Mapping Strategy for 3D NAND Flash Memory
    • Y. Wang, L. Bathen, Z. Shao, N. Dutt
    • Proceedings of the 15th Conference on Design, Automation and Test in Europe (DATE'12), [paper] [slides]
  • VaMV: Variability-aware Memory Virtualization
    • L. Bathen, N. Dutt, P. Gupta, A. Nicolau
    • Proceedings of the 15th Conference on Design, Automation and Test in Europe (DATE'12), Best IP Award, [paper] [slides]

2011

  • Exploiting Unreliable Memories
    • L. Bathen, N. Dutt
    • Proceedings of the International Symposium on Electronic System Design (ISE'11), Invited Keynote Paper, [paper] [slides]
  • Neuromorphic Modeling Abstractions and Simulation of Large-Scale Cortical Networks
    • J. Moorkanikara, M. Richert, N. Dutt, J. Krichmar
    • Proceedings of the International Conference on Computer Aided Design (ICCAD'11), [paper] [slides]
  • DynaPoMP: Dynamic Policy-Driven Memory Protection for SPM-based Embedded Systems
    • D. Hong, L. Bathen, S. Lim, N. Dutt
    • Proceedings of the 6th Workshop on Embedded Systems Security (WESS'11), [paper] [slides]
  • SPMVisor: Dynamic ScratchPad Memory Virtualization for Secure, Low Power and High Performance, Distributed On-Chip Memories
    • L. Bathen, D. Shin, S. Lim, N. Dutt
    • Proceedings of the International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS'11), Best Paper Award Nomination, [paper][slides]
  • FFT-Cache: A Flexible Fault-Tolerant Cache Architecture for Ultra Low Voltage Operation
    • A. BanaiyanMofrad, H. Homayoun, N. Dutt
    • Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'11), [paper][slides]
  • TrustGeM: Dynamic Trusted Environment Generation for Chip-Multiprocessors
    • L. Bathen, N. Dutt
    • Proceedings of the 4th Annual IEEE International Symposium on Hardware-Oriented Security and Trust (HOST'11), [paper] [slides]
  • Slack-aware Scheduling on Coarse Grained Reconfigurable Arrays
    • G. Ansaloni, K. Tanimura, L. Pozzi, N. Dutt
    • Proceedings of the 2011 Conference on Design, Automation and Test in Europe (DATE'11), [paper] [slides]
  • E-RoC: Embedded RAIDs-on-Chip for Low Power Distributed Dynamically Managed Reliable Memories
    • L. Bathen, N. Dutt
    • Proceedings of the 2011 Conference on Design, Automation and Test in Europe (DATE'11), [paper][slides]

2010

  • Towards Practical High-Level Synthesis from Large Behavioral Descriptions
    • Y. Azumi-Hara, T. Matsuba, H. Tomiyama, S. Honda, H. Takada, N. Dutt
    • Proceedings of the International SoC Design Conference (ISOCC'10), [paper] [slides]
  • Towards Reverse Engineering The Brain: Modeling Abstractions and Simulation Frameworks
    • J. Moorkanikara, M. Richert, N. Dutt and J. Krichmar
    • Proceedings of the International Conference on Very Large Scale Integration (VLSI-SoC'10), [paper] [slides]
  • PoliMakE: A Policy Making Engine for Secure Embedded Software Execution on Chip-Multiprocessors
    • L. Bathen, N. Dutt
    • Proceedings of the 5th Workshop on Embedded Systems Security (WESS'10), [paper][slides]
  • E < MC^2 : Less Energy through Multi-Copy Cache
    • A. Chakraborty, H. Homayoun, A. Khajeh, N. Dutt, A. Eltawil, F. Kurdahi
    • Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'10), [paper] [slides]
  • ExCCel: Exploration of Complementary Cells for Efficient DPA Attack Resistivity
    • K. Tanimura, N. Dutt
    • Proceedings of the 3rd International Symposium on Hardware-Oriented Security and Trust (HOST'10), [paper] [slides]
  • Multiple Sleep Modes Leakage Control in Peripheral Circuits of a All Major SRAM-Based Processor Units
    • H. Homayoun, A. Sasan, A. Gupta, A. Veidenbaum, F. Kurdahi, N. Dutt
    • Proceedings of the International Conference on Computing Frontiers (CF'10), [paper] [slides]
  • Inter and Intra Kernel Reuse Analysis Driven Pipelining on Chip-Multiprocessors
    • L. Bathen, Y. Ahn, N. Dutt
    • Proceedings of the 2010 International Symposium on VLSI Design, Automation & Test (VLSI-DAT'10), [paper] [slides]
  • Routing-aware Application Mapping Considering Steiner Points for Coarse-grained Reconfigurable Architecture
    • G. Lee, S. Lee, K. Choi, N. Dutt
    • Proceedings of the 6th International Symposium on Applied Reconfigurable Computing (ARC'10), [paper] [slides]
  • RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor
    • H. Homayoun, A. Gupta, A. Veidenbaum, F. Kurdahi, N. Dutt
    • Proceedings of the International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC'10), [paper][slides]

2009

  • A Methodology for Power-aware Pipelining via High-Level Performance Model Evaluations
    • L. Bathen, Y. Ahn, S. Pasricha, N. Dutt
    • Proceedings of the 10th International Workshop on Microprocessor Test and Verification (MTV'09), [paper][slides]
  • QoS-aware Dynamic Power Management for Coarse-Grained Reconfigurable Architectures
    • G. Lee, M. Jo, Y. Ahn, K. Choi, N. Dutt
    • Proceedings of the 2009 International Conference on Field Programmable Technology (FPT'09), [paper] [slides]
  • Inter-kernel Data Reuse and Pipelining on Chip-Multiprocessors for Multimedia Applications
    • L. Bathen, Y. Ahn, S. Pasricha, N. Dutt
    • Proceedings of the 7th IEEE Workshop on Embedded Systems for Real Time Multimedia (ESTIMEDIA'09), [paper][slides]
  • Adaptive Reduced Bit-width Instruction Set Architecture (adapt-rISA)
    • S. Soares, A. Halambi, A. Shrivastava, F. Wagner, N. Dutt
    • Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'09) , [paper][slides]
  • TransMutations: Towards a Human-Quality Optimizing Compiler
    • A. Halambi, N. Dutt, A. Nicolau
    • Proceedings of the EuroMicro Digital System Design Conference (DSD'09), Invited Keynote Paper, [paper] [slides]
  • Efficient Simulation of Large-Scale Spiking Neural Networks Using CUDA Graphics Processors
    • J. Moorkanikara, N. Dutt, J. Krichmar, A. Nicolau, A. Veidenbaum
    • Proceedings of the International Joint Conference on Neural Networks (IJCNN'09), Best Paper Award, [paper] [slides]
  • Computing Spike-Based Convolutions on GPUs
    • J. Moorkanikara, N. Dutt, Y. Wang, T. Delbrueck
    • Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'09), [paper] [slides]
  • On Chip Communication-Architecture Based Thermal Management for SoCs
    • A. Gupta, S. Pasricha, N. Dutt, F. Kurdahi, K. Khouri, M. Abadir
    • Proceedings of the International Symposium on VLSI Design, Automation & Test (VLSI-DAT'09), [paper] [slides]
  • A Conservative Approximation Method for the Verification of Preemptive Scheduling using Timed Automata
    • G. Madl, S. Abdelwahed, N. Dutt
    • Proceedings of IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS’09), [paper][slides]
  • TRAM: A Tool For Temperature and Reliability Aware Memory Design
    • A Khajeh, A Gupta, N Dutt, F Kurdahi, A Eltawil
    • Proceedings of the Conference on Design, Automation and Test in Europe (DATE'09), [paper] [slides]
  • Dynamically Reconfigurable On-Chip Communication Architectures for Multi Use-Case Chip Multiprocessor Applications
    • S. Pasricha, N. Dutt, F. Kurdahi
    • Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'09), [paper] [slides]
  • Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications
    • S. Pasricha, N. Dutt, F. Kurdahi
    • Proceedings of the International Conference on VLSI Design (VLSI Design'09), [paper] [slides]

Journal Articles

2017

  • Exploiting Heterogeneity for Aging-Aware Load Balancing in Mobile Platforms
    • Tiago Rogério Mück, Zana Ghaderi, Nikil D. Dutt, Eli Bozorgzadeh
    • IEEE Trans. Multi-Scale Computing Systems, 2017.
  • Accuracy Aware Power Management for Many-core Systems running Error Resilient Applications
    • Anil Kanduri, Mohammad-Hashem Haghbayan, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen, and Nikil Dutt
    • IEEE Transactions on Very Large Scale Integration Systems (IEEE-TVLSI), 2017.

2016

  • Automatic management of Software Programmable Memories in Many-core Architectures. IET Computers & Digital Techniques
    • Aviral Shrivastava, Nikil Dutt, Jian Cai, Majid Shoushtari, Bryan Donyanavard, Hossein Tajik
    • IET Computers & Digital Techniques
  • Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC) Perspective
    • Nikil D. Dutt, Axel Jantsch, Santanu Sarma
    • ACM Trans. Embedded Comput. Syst.
  • SPMPool: Runtime SPM Management for Memory-Intensive Applications in Embedded Many-Cores
    • Hossein Tajik, Bryan Donyanavard, Nikil Dutt, Janmartin Jahn, Jörg Henkel
    • ACM Trans. Embedded Comput. Syst.

2015

  • Exploiting Partially-Forgetful Memories for Approximate Computing
    • M. Shoushtari, A. BanayianMofrad, and N. Dutt
    • IEEE Embedded Systems Letters (IEEE-ESL), [paper]
  • Cooperative On-Chip Temperature Estimation Using Multiple Virtual Sensors
    • J. Shin, F. Kurdahi, and N. Dutt
    • IEEE Embedded Systems Letters (IEEE-ESL), [paper]
  • NSF expedition on variability-aware software: Recent results and contributions
    • Lucas Francisco Wanner, Liangzhen Lai, Abbas Rahimi, Mark Gottscho, Pietro Mercati, Chu-Hsiang Huang, Frederic Sala, Yuvraj Agarwal, Lara Dolecek, Nikil D. Dutt, Puneet Gupta, Rajesh K. Gupta, Ranjit Jhala, Rakesh Kumar, Sorin Lerner, Subhasish Mitra, Alexandru Nicolau, Tajana Simunic Rosing, Mani B. Srivastava, Steven Swanson, Dennis Sylvester, Yuanyuan Zhou
    • it - Information Technology
  • Using a Flexible Fault-Tolerant Cache to Improve Reliability for Ultra Low Voltage Operation
    • A. Banaiyanmofrad, H. Homayoun, N. Dutt
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]

2014

  • A Reliability-Aware Address Mapping Strategy for NAND Flash Memory Storage Systems
    • Y. Wang, M. Huang, Z. Shao, H. Chan, L. Bathen, and N. Dutt
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), [paper]
  • Multicopy Cache: A Highly Energy-Efficient Cache Architecture
    • A. Chakraborty, H. Homayoun, A. Khajeh, N. Dutt, A. Eltawil, F. Kurdahi
    • ACM Transactions on Embedded Computing Systems (TECS), [paper]
  • SPMCloud: Towards the Single-Chip Embedded ScratchPad Memory-Based Storage Cloud
    • L. Bathen, N. Dutt
    • ACM Transactions on Design Automation of Electronic Systems (TODAES), [paper]
  • ViPZonE: Hardware Power Variability-Aware Virtual Memory Management for Energy Savings
    • M. Gottscho, L. A. D. Bathen, N. Dutt, A. Nicolau, P. Gupta
    • IEEE Transactions on Computers, [paper]
  • NoC-based Fault-tolerant Cache Design in Chip Multiprocessors
    • A. Banaiyanmofrad, G. Girão, N. Dutt
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • Embedded RAIDs-on-chip for Bus-based Chip-multiprocessors
    • L. Bathen, N. Dutt
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • Efficient Spiking Neural Network Model of Pattern Motion Selectivity in Visual Cortex
    • M. Beyeler, M. Richert, N. Dutt, J. Krichmar
    • ELSEVIER Neuroinformatics, [paper]
  • A Reliability Enhanced Address Mapping Strategy for Three-Dimensional (3-D) NAND Flash Memory
    • Y. Wang, Z. Shao, H. Chan, L. Bathen, N. Dutt
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]
  • An Efficient Automated Parameter Tuning Framework for Spiking Neural Networks
    • K. Carlson, J. Nageswaran, N. Dutt, J. Krichmar
    • Frontiers in Neuroscience, [paper]

2013

  • Mechanisms Underlying the Basal Forebrain Enhancement of Top-down and Bottom-up Attention
    • M. Avery, N. Dutt, J. L. Krichmar
    • European Journal of Neuroscience, [paper]
  • A Large-scale Neural Network Model of the Influence of Neuromodulatory Levels on Working Memory and Behavior
    • M. Avery, N. Dutt, J. L. Krichmar
    • Frontiers in Computational Neuroscience, [paper]
  • Categorization and Decision-making in a Neurobiologically Plausible Spiking Network Using a STDP-like Learning Rule
    • M. Beyeler, N. Dutt, J. L. Krichmar
    • ELSEVIER Neural Networks, [paper]
  • MultiMaKe: Chip-multiprocessor Driven Memory-aware Kernel Pipelining
    • L. Bathen, Y. Ahn, S. Pasricha, N. Dutt
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • Virtualizing On-Chip Distributed ScratchPad Memories for Low Power and Trusted Application Execution
    • L. Bathen, D. Shin, S. Lim, N. Dutt
    • Springer Journal of Design Automation for Embedded Systems (DAES), [paper]
  • Underdesigned and Opportunistic Computing in Presence of Hardware Variability
    • P. Gupta, Y. Agarwal, L. Dolecek, N. Dutt, R.K. Gupta, R. Kumar, S. Mitra, T.S. Rosing, M.B. Srivastava, S. Swanson, D. Sylvester
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Keynote Paper, [paper]

2012

  • Combining Code Reordering and Cache Configuration
    • A. Gordon-Ross, F. Vahid, N. Dutt
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • xTune: A Formal Methodology for Cross-layer Tuning of Mobile Embedded Systems
    • M. Kim, M. Stehr, C. Talcott, N. Dutt, N. Venkatasubramanian
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • Integrated Kernel Partitioning and Scheduling for Coarse-Grained Reconfigurable Arrays
    • G. Ansaloni, K. Tanimura, L. Pozzi, N. Dutt
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), [paper]
  • HDRL: Homogeneous Dual-Rail Logic for DPA Attack Resistive Secure Circuit Design
    • K. Tanimura, N. Dutt
    • IEEE Embedded Systems Letters (IEEE-ESL), [paper]
  • EAVE: Error Aware Video Encoding for Energy/QoS Tradeoffs
    • K.W. Lee, N. Dutt, N. Venkatasubramanian
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • Error-aware Algorithm/Architecture Co-exploration for Video Over Wireless Applications
    • A. Khajeh, M. Kim, N. Dutt, A. Eltawil, F. Kurdahi
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • Resilient, Dependable CyberPhysical Systems: A Middleware Perspective
    • G. Denker, N. Dutt, S. Mehrotra, M.Stehr, C. Talcott, N. Venkatasubramanian
    • Springer Journal of Internet Services and Applications, [paper]

2011

  • An Efficient and Flexible Simulation Environment for Modeling Large-Scale Cortical Processing
    • M. Richert, J. Moorkanikara, N. Dutt, J. L. Krichmar
    • Frontiers in Neuroinformatics, [paper]
  • Mapping Multi-Domain Applications onto Coarse-Grained Reconfigurable Architectures
    • G. Lee, K. Choi, N. Dutt
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), [paper]
  • A Multi-Granularity Power Modeling Methodology for Embedded Processors
    • Y. Park, S. Pasricha, N.D. Dutt, F. Kurdahi
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]

2010

  • Bandwidth Management in Application Mapping for Dynamically Reconfigurable Architectures
    • S. Banerjee, E. Bozorgzadeh, J. Noguera, N. Dutt
    • ACM Transactions on Reconfigurable Technology and Systems (TRETS), [paper]
  • Partitioning Techniques for Partially Protected Caches in Resource-Constrained Embedded Systems
    • K. Lee, A. Shrivastava, N. Dutt, N. Venkatasubramanian
    • ACM Transactions on Design Automation of Electronic Systems (ACM-TODAES), [paper]
  • Evaluating Carbon Nanotube Global Interconnects for Chip Multiprocessor Applications
    • S. Pasricha, F. Kurdahi, N. Dutt
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]
  • CAPPS: A Framework for Power-Performance Trade-Offs in On-Chip Communication Architecture Synthesis
    • S. Pasricha, Y. Park, F. Kurdahi, N. Dutt
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]

2009

  • Partially Protected Caches to Reduce Failures due to Soft Errors in Multimedia Applications
    • K. Lee, A. Shrivastava, I. Issenin, N.D. Dutt, N. Venkatasubramanian
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]
  • Cross-abstraction Functional Verification and Performance Analysis of Chip Multiprocessor Designs
    • G. Madl, S. Pasricha, N. Dutt, S. Abdelwahed
    • IEEE Transactions on Industrial Informatics, Special section on Real-Time and (Networked) Embedded Systems, [paper]
  • A Configurable Simulation Environment for the Efficient Simulation of Large-Scale Spiking Neural Networks on Graphics Processors
    • J. Moorkanikara, N. Dutt, J. Krichmar, A. Nicolau, A. Veidenbaum
    • Neural Networks, [paper]
  • Brain Derived Vision Algorithm on High Performance Architectures
    • J. Moorkanikara, A. Felch, A. Chandrasekhar, N, Dutt, R. Granger, A. Nicolau, A. Veidenbaum
    • International Journal of Parallel Processing (IJPP), [paper]
  • Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications
    • D. Cho, S. Pasricha, I. Issenin, N. Dutt, Y. Paek
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), [paper]
  • Hybrid Compiled Simulation: An Efficient Technique for Instruction-set Architecture Simulation
    • M. Reshadi, P. Mishra, N. Dutt
    • ACM Transactions on Embedded Computing Systems (ACM-TECS), [paper]
  • System-level PVT Variation Aware Power Exploration of On-Chip Communication Architectures
    • S. Pasricha, Y. Park, F. Kurdahi, N. Dutt
    • ACM Transactions on Design Automation of Electronic Systems (ACM-TODAES), [paper]
  • Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures
    • A. Shrivastava, I. Issenin, N. Dutt, S. Park, Y. Paek
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), [paper]
  • Exploiting Application Data-parallelism on Dynamically Reconfigurable Architectures: Placement and Architectural Considerations
    • S. Banerjee, E. Bozorgzadeh, N. Dutt
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]
  • Fast Configurable-Cache Tuning with a Unified Second-Level Cache
    • A. Gordon-Ross, F. Vahid, N. Dutt,
    • IEEE Transactions on Very Large Scale Integration Systems (TVLSI), [paper]

Technical Reports

  • Design Space Exploration Framework for Memory Exploration in Heterogeneous Architectures [CECS TR 16-03]
    • Kasra Moazzemi, Chen-Ying Hsieh, Nikil Dutt
  • Relaxing Manufacturing Guard-bands in Memories for Energy Saving [CECS TR 14-04]
    • Majid Shoushtari, Abbas Banaiyan, Nikil Dutt
  • SPMPool: Runtime SPM Management for Embedded Many-Cores [CECS TR 14-08]
    • Hossein Tajik, Bryan Donyanavard, Janmartin Jahn, Joerg Henkel, Nikil Dutt
  • Cross-Layer Design Space Exploration of Heterogeneous Multicore Processors With Predictive Models [CECS TR 14-02]
    • Santanu Sarma, Nikil Dutt
  • Strength of Diversity: Exploiting Cheap Heterogeneous Nosiy Sensors for Accurate Full-Chip Thermal Estimation and Prediction [CECS TR 14-01]
    • Santanu Sarma, Nikil Dutt, Puneet Gupta
  • Cyber Physical-System-On-Chip (CPSoC): Sensor-Actuator Rich Self-Aware Computational Platform [CECS TR 13-06]
    • Santanu Sarma, Nikil Dutt, Nalini Venkatasubramanian, Alex Nicolau, Puneet Gupta
  • Analyzing and Exploring Fault-tolerant Distributed memories for NoCs [CECS TR 12-15]
    • Abbas BanaiyanMofrad, Gustavo Girao, Nikil Dutt
  • Mobile Embedded Software with Android: Course Design and Experience [CECS TR 12-10]
    • Gu-Min Jeong, DOng-Byeong Kang, Sung-Soo Lim and Nikil D. Dutt
  • An Embedded Hybrid-Memory-Aware Virtualization Layer for Chip-Multiprocessor [CECS TR 12-03]
    • Luis Angel D. Bathen, Nikil Dutt
  • A Standard Cell-Based DPA Attack Countermeasure using Homogeneous Dual-Rail Logic (HDRL) [CECS TR 12-01]
    • Kazuyuki Tanimura, Nikil Dutt
  • A Case for an Adaptive and Opportunistic Variability-Aware Memory Virtualization Layer [CECS TR 11-09]
    • Luis Angel D. Bathen, Puneet Gupta, Alex Nicolau, Nikil D. Dutt
  • Towards Distributed On-Chip Memory Virtualization [CECS TR 11-08]
    • Luis Angel D. Bathen, Dongyoun Shin, Sung-Soo Lim, Nikil D. Dutt
  • Using a Flexible Fault-Tolerant Cache (FFT-Cache) to Improve Reliability in Ultra Low Voltage Operation [CECS TR 11-07]
    • Abbas BanaiyanMofrad, Houman Homayoun, Nikil D. Dutt
  • Low Overhead DPA Countermeasure using ExCCel (Exploration of Complementary Cells) [CECS TR 10-04]
    • Kazuyuki Tanimura, Nikil Dutt
  • Towards Embedded RAIDs-on-Chip [CECS TR 10-12]
    • Luis Angel D. Bathen, Nikil Dutt

Books

  • Processor Description Languages: Applications and Methodologies
    • Prabhat Mishra, Nikil D. Dutt
    • Morgan Kaufman/Elsevier Systems-on-Silicon Series, 2008, Link
  • On-Chip Communication Architectures: System on Chip Interconnect
    • Sudeep Pasricha, Nikil D. Dutt
    • Morgan Kaufman/Elsevier Systems-on-Silicon Series, 2008, Link
  • Functional Verification of Programmable Embedded Architectures: A Top-Down Approach
    • Prabhat Mishra, Nikil D. Dutt
    • Springer, 2005, Link
  • SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits
    • Sumit Gupta, Rajesh Gupta, Nikil D. Dutt, Alexandru Nicolau
    • Kluwer Academic Publishers, Norwell, MA, 2004
  • Memory Architecture Exploration for Programmable Embedded Systems
    • Peter Grun, Nikil D. Dutt, Alexandru Nicolau
    • Kluwer Academic Publishers, Norwell, MA, 2003
  • Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration
    • Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    • Kluwer Academic Publishers, Norwell, MA, 1998
  • High Level Synthesis: Introduction to Chip and System Design
    • Daniel D. Gajski, Nikil D. Dutt, Allen C-H Wu, Steve Y-L Lin
    • Kluwer Academic Publishers, Norwell, MA, 1992
    • Second Printing, Kluwer Academic Publishers, 1993