The Dutt Research Group (DRG) conducts research in the broad areas of  embedded systems, Electronic Design Automation (EDA), computer architecture and compilers, distributed systems, healthcare IoT, and brain-inspired architectures and computing.

Current research themes are focused on computational self-awareness principles for adaptive, resilient system design, smart IoT-enabled healthcare technology, domain-specific programmable architectures for hardware acceleration (post-quantum crypto, neural networks), and simulation platforms and architectures for neuromorphic computing.  See the DRG Projects page for more information.

Active funded research projects in DRG:

  • IPF (NSF): Information Processing Factory for conquering MPSoC Complexity
  • UNITE (NSF): Smart, Connected, and Coordinated Maternal Care for Underserved Communities
  • CareDex: Enhance and Transform the Resilience of Older Adults in Our Communities During Disasters


Ongoing and past DRG projects include architectural description languages to facilitate rapid design exploration of programmable embedded systems, and automatic generation of software toolkits supporting embedded systems development (including optimizing compilers, simulators, and verification/validation),  cross-layer design and optimization of reliable, distributed embedded systems, and memory architecture exploration for embedded systems.

Some sample past funded research projects in DRG:

  • SAGE-CPSoC (EU Marie-Curie): Self-Aware CPSoCs with Hierarchical Goal Management
  • IoCT-CARE (NSF): Internet-of-Cognitive Things for Personalized Healthcare
  • Variability Expedition:  Variability-Aware Software for Efficient Nanoscale Devices (NSF)
  • Automated Parameter Tuning of Large-Scale Spiking Neural Networks (NSF)
  • Mobile GPU and  Memory Optimizations & Energy-Efficient DVFS Policies for Graphics-Intensive Mobile Applications (Samsung)
  • Cross-Layer Error Exploitation for Next Generation SoCs (NSF)
  • Temperature-aware SoC Optimization Framework (SRC)
  • CYPRESS:  CYber-Physical RESilience & Sustainability (NSF)
  • Modeling and Exploiting Cross-Layer Timing in Distributed Embedded Systems (NSF)
  • FORGE: Framework for optimizing distributed, real-time, and embedded (DRE) systems  (NSF)
  • COPPER: Compiler-Controlled Continuous Power-Performance Management (DARPA)
  • EXPRESSION: Architectural Description Language for design space exploration of processor-memory architectures (NSF, SRC, Motorola, Intel, Hitachi, Fujitsu)
  • SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits (SRC, Intel)
  • Compiler-in-the-Loop Exploration of Embedded Systems (Intel, SRC)
  • Ultimately Reliable and Safe (Zero-Recall) Software Technology (with  Kookmin University, Korea)
  • COMMEX:  On-Chip Communication Architecture Exploration (Conexant)
  • Platform-Oriented CAD for Power and Performance Optimization (NSF)
  • ITR: Virtual Power for the Wireless Campus (NSF)
  • SOC Power Optimization Framework (SRC)