2000
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru On-chip vs. off-chip memory: the data partitioning problem in embedded
processor-based systems Journal Article In: ACM Trans. Design Autom. Electr. Syst., vol. 5, no. 3, pp. 682–704, 2000. @article{DBLP:journals/todaes/PandaDN00b,
title = {On-chip vs. off-chip memory: the data partitioning problem in embedded
processor-based systems},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1145/348019.348570},
doi = {10.1145/348019.348570},
year = {2000},
date = {2000-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {5},
number = {3},
pages = {682--704},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
-, Allen C; Dutt, Nikil D Guest editorial 11th international symposium on system-level synthesis
and design (ISSS'98) Journal Article In: IEEE Trans. Very Large Scale Integr. Syst., vol. 8, no. 5, pp. 469–471, 2000. @article{DBLP:journals/tvlsi/WuD00b,
title = {Guest editorial 11th international symposium on system-level synthesis
and design (ISSS'98)},
author = {Allen C - and Nikil D Dutt},
url = {https://doi.org/10.1109/TVLSI.2000.894151},
doi = {10.1109/TVLSI.2000.894151},
year = {2000},
date = {2000-01-01},
journal = {IEEE Trans. Very Large Scale Integr. Syst.},
volume = {8},
number = {5},
pages = {469--471},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Tomiyama, Hiroyuki; Dutt, Nikil D Program path analysis to bound cache-related preemption delay in preemptive
real-time systems Proceedings Article In: Vahid, Frank; Madsen, Jan (Ed.): Proceedings of the Eighth International Workshop on Hardware/Software
Codesign, CODES 2000, San Diego, California, USA, 2000, pp. 67–71, ACM, 2000. @inproceedings{DBLP:conf/codes/TomiyamaD00b,
title = {Program path analysis to bound cache-related preemption delay in preemptive
real-time systems},
author = {Hiroyuki Tomiyama and Nikil D Dutt},
editor = {Frank Vahid and Jan Madsen},
url = {https://doi.org/10.1145/334012.334025},
doi = {10.1145/334012.334025},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the Eighth International Workshop on Hardware/Software
Codesign, CODES 2000, San Diego, California, USA, 2000},
pages = {67--71},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Memory aware compilation through accurate timing extraction Proceedings Article In: Micheli, Giovanni De (Ed.): Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000, pp. 316–321, ACM, 2000. @inproceedings{DBLP:conf/dac/GrunDN00b,
title = {Memory aware compilation through accurate timing extraction},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
editor = {Giovanni De Micheli},
url = {https://doi.org/10.1145/337292.337428},
doi = {10.1145/337292.337428},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000},
pages = {316--321},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Catthoor, Francky; Dutt, Nikil D; Kozyrakis, Christoforos E How to Solve the Current Memory Access and Data Transfer Bottlenecks:
At the Processor Architecture or at the Compiler Level? Proceedings Article In: Bolsens, Ivo (Ed.): 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France, pp. 426–433, IEEE Computer Society / ACM, 2000. @inproceedings{DBLP:conf/date/CatthoorDK00b,
title = {How to Solve the Current Memory Access and Data Transfer Bottlenecks:
At the Processor Architecture or at the Compiler Level?},
author = {Francky Catthoor and Nikil D Dutt and Christoforos E Kozyrakis},
editor = {Ivo Bolsens},
url = {https://doi.org/10.1109/DATE.2000.840306},
doi = {10.1109/DATE.2000.840306},
year = {2000},
date = {2000-01-01},
booktitle = {2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France},
pages = {426--433},
publisher = {IEEE Computer Society / ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Halambi, Ashok; Cornea, Radu; Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Architecture Exploration of Parameterizable EPIC SOC Architectures Proceedings Article In: Bolsens, Ivo (Ed.): 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France, pp. 748, IEEE Computer Society / ACM, 2000. @inproceedings{DBLP:conf/date/HalambiCGDN00b,
title = {Architecture Exploration of Parameterizable EPIC SOC Architectures},
author = {Ashok Halambi and Radu Cornea and Peter Grun and Nikil D Dutt and Alexandru Nicolau},
editor = {Ivo Bolsens},
url = {https://doi.org/10.1109/DATE.2000.840881},
doi = {10.1109/DATE.2000.840881},
year = {2000},
date = {2000-01-01},
booktitle = {2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France},
pages = {748},
publisher = {IEEE Computer Society / ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Tomiyama, Hiroyuki; Yoshino, Taisei; Dutt, Nikil D Verification of in-order execution in pipelined processors Proceedings Article In: Proceedings of the IEEE International High-Level Design Validation
and Test Workshop 2000, Berkeley, California, USA, November 8-10,
2000, pp. 40–44, IEEE Computer Society, 2000. @inproceedings{DBLP:conf/hldvt/TomiyamaYD00b,
title = {Verification of in-order execution in pipelined processors},
author = {Hiroyuki Tomiyama and Taisei Yoshino and Nikil D Dutt},
url = {https://doi.org/10.1109/HLDVT.2000.889557},
doi = {10.1109/HLDVT.2000.889557},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the IEEE International High-Level Design Validation
and Test Workshop 2000, Berkeley, California, USA, November 8-10,
2000},
pages = {40--44},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru MIST: An Algorithm for Memory Miss Traffic Management Proceedings Article In: Sentovich, Ellen (Ed.): Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000, pp. 431–437, IEEE Computer Society, 2000. @inproceedings{DBLP:conf/iccad/GrunDN00b,
title = {MIST: An Algorithm for Memory Miss Traffic Management},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
editor = {Ellen Sentovich},
url = {https://doi.org/10.1109/ICCAD.2000.896510},
doi = {10.1109/ICCAD.2000.896510},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {431--437},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nachtergaele, Lode; Tiwari, Vivek; Dutt, Nikil D System and Architecture-Level Power Reduction for Microprocessor-Based
Communication and Multi-Media Applications Proceedings Article In: Sentovich, Ellen (Ed.): Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000, pp. 569–573, IEEE Computer Society, 2000. @inproceedings{DBLP:conf/iccad/NachtergaeleTD00b,
title = {System and Architecture-Level Power Reduction for Microprocessor-Based
Communication and Multi-Media Applications},
author = {Lode Nachtergaele and Vivek Tiwari and Nikil D Dutt},
editor = {Ellen Sentovich},
url = {https://doi.org/10.1109/ICCAD.2000.896533},
doi = {10.1109/ICCAD.2000.896533},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {569--573},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Halambi, Ashok; Dutt, Nikil D; Nicolau, Alexandru Customizing Software Toolkits for Embedded Systems-On-Chip Proceedings Article In: Kleinjohann, Bernd (Ed.): Architecture and Design of Distributed Embedded Systems, IFIP WG10.3/WG10.4/WG10.5
International Workshop on Distributed and Parallel Embedded Systems
(DIPES 2000), October 18-19, 2000, Schloß Eringerfeld, Germany, pp. 87–98, Kluwer, 2000. @inproceedings{DBLP:conf/ifip10-3/HalambiDN00b,
title = {Customizing Software Toolkits for Embedded Systems-On-Chip},
author = {Ashok Halambi and Nikil D Dutt and Alexandru Nicolau},
editor = {Bernd Kleinjohann},
year = {2000},
date = {2000-01-01},
booktitle = {Architecture and Design of Distributed Embedded Systems, IFIP WG10.3/WG10.4/WG10.5
International Workshop on Distributed and Parallel Embedded Systems
(DIPES 2000), October 18-19, 2000, Schloß Eringerfeld, Germany},
volume = {189},
pages = {87--98},
publisher = {Kluwer},
series = {IFIP Conference Proceedings},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Aggressive Memory-Aware Compilation Proceedings Article In: Chong, Frederic T; Kozyrakis, Christoforos E; Oskin, Mark (Ed.): Intelligent Memory Systems, Second International Workshop, IMS 2000,
Cambridge, MA, USA, November 12, 2000, Revised Papers, pp. 147–151, Springer, 2000. @inproceedings{DBLP:conf/ims/GrunDN00b,
title = {Aggressive Memory-Aware Compilation},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
editor = {Frederic T Chong and Christoforos E Kozyrakis and Mark Oskin},
url = {https://doi.org/10.1007/3-540-44570-6_10},
doi = {10.1007/3-540-44570-6_10},
year = {2000},
date = {2000-01-01},
booktitle = {Intelligent Memory Systems, Second International Workshop, IMS 2000,
Cambridge, MA, USA, November 12, 2000, Revised Papers},
volume = {2107},
pages = {147--151},
publisher = {Springer},
series = {Lecture Notes in Computer Science},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1999
|
Panda, Preeti Ranjan; Nakamura, Hiroshi; Dutt, Nikil D; Nicolau, Alexandru Augmenting Loop Tiling with Data Alignment for Improved Cache Performance Journal Article In: IEEE Trans. Computers, vol. 48, no. 2, pp. 142–149, 1999. @article{DBLP:journals/tc/PandaNDN99b,
title = {Augmenting Loop Tiling with Data Alignment for Improved Cache Performance},
author = {Preeti Ranjan Panda and Hiroshi Nakamura and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/12.752655},
doi = {10.1109/12.752655},
year = {1999},
date = {1999-01-01},
journal = {IEEE Trans. Computers},
volume = {48},
number = {2},
pages = {142--149},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Local memory exploration and optimization in embedded systems Journal Article In: IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 18, no. 1, pp. 3–13, 1999. @article{DBLP:journals/tcad/PandaDN99b,
title = {Local memory exploration and optimization in embedded systems},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/43.739054},
doi = {10.1109/43.739054},
year = {1999},
date = {1999-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {18},
number = {1},
pages = {3--13},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D Low-power memory mapping through reducing address bus activity Journal Article In: IEEE Trans. Very Large Scale Integr. Syst., vol. 7, no. 3, pp. 309–320, 1999. @article{DBLP:journals/tvlsi/PandaD99b,
title = {Low-power memory mapping through reducing address bus activity},
author = {Preeti Ranjan Panda and Nikil D Dutt},
url = {https://doi.org/10.1109/92.784092},
doi = {10.1109/92.784092},
year = {1999},
date = {1999-01-01},
journal = {IEEE Trans. Very Large Scale Integr. Syst.},
volume = {7},
number = {3},
pages = {309--320},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Halambi, Ashok; Grun, Peter; Ganesh, Vijay; Khare, Asheesh; Dutt, Nikil D; Nicolau, Alexandru EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator
Retargetability Proceedings Article In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March
1999, Munich, Germany, pp. 485–490, IEEE Computer Society / ACM, 1999. @inproceedings{DBLP:conf/date/HalambiGGKDN99b,
title = {EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator
Retargetability},
author = {Ashok Halambi and Peter Grun and Vijay Ganesh and Asheesh Khare and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/DATE.1999.761170},
doi = {10.1109/DATE.1999.761170},
year = {1999},
date = {1999-01-01},
booktitle = {1999 Design, Automation and Test in Europe (DATE '99), 9-12 March
1999, Munich, Germany},
pages = {485--490},
publisher = {IEEE Computer Society / ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Foster, Eric M Design of a set-top box system on a chip (abstract) Proceedings Article In: White, Jacob K; Sentovich, Ellen (Ed.): Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 608, IEEE Computer Society, 1999. @inproceedings{DBLP:conf/iccad/DuttF99b,
title = {Design of a set-top box system on a chip (abstract)},
author = {Nikil D Dutt and Eric M Foster},
editor = {Jacob K White and Ellen Sentovich},
url = {http://doi.ieeecomputersociety.org/10.1109/ICCAD.1999.10000},
doi = {10.1109/ICCAD.1999.10000},
year = {1999},
date = {1999-01-01},
booktitle = {Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999},
pages = {608},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Kelley, Brian On the rapid prototyping and design of a wireless communication system
on a chip (abstract) Proceedings Article In: White, Jacob K; Sentovich, Ellen (Ed.): Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 609, IEEE Computer Society, 1999. @inproceedings{DBLP:conf/iccad/DuttK99b,
title = {On the rapid prototyping and design of a wireless communication system
on a chip (abstract)},
author = {Nikil D Dutt and Brian Kelley},
editor = {Jacob K White and Ellen Sentovich},
url = {http://doi.ieeecomputersociety.org/10.1109/ICCAD.1999.10002},
doi = {10.1109/ICCAD.1999.10002},
year = {1999},
date = {1999-01-01},
booktitle = {Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999},
pages = {609},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Halambi, Ashok; Dutt, Nikil D; Nicolau, Alexandru RTGEN: An Algorithm for Automatic Generation of Reservation Tables
from Architectural Descriptions Proceedings Article In: Proceedings of the 12th International Symposium on System Synthesis,
ISSS '99, Boca Raton, Florida, USA, November 1-4, 1999, pp. 44–50, ACM / IEEE Computer Society, 1999. @inproceedings{DBLP:conf/isss/GrunHDN99b,
title = {RTGEN: An Algorithm for Automatic Generation of Reservation Tables
from Architectural Descriptions},
author = {Peter Grun and Ashok Halambi and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ISSS.1999.814259},
doi = {10.1109/ISSS.1999.814259},
year = {1999},
date = {1999-01-01},
booktitle = {Proceedings of the 12th International Symposium on System Synthesis,
ISSS '99, Boca Raton, Florida, USA, November 1-4, 1999},
pages = {44--50},
publisher = {ACM / IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Khare, Asheesh; Savoiu, Nicolae; Halambi, Ashok; Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru V-SAT: A Visual Specification and Analysis Tool for System-On-Chip
Exploration Proceedings Article In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice
for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1196–1203, IEEE Computer Society, 1999. @inproceedings{DBLP:conf/euromicro/KhareSHGDN99b,
title = {V-SAT: A Visual Specification and Analysis Tool for System-On-Chip
Exploration},
author = {Asheesh Khare and Nicolae Savoiu and Ashok Halambi and Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/EURMIC.1999.794466},
doi = {10.1109/EURMIC.1999.794466},
year = {1999},
date = {1999-01-01},
booktitle = {25th EUROMICRO '99 Conference, Informatics: Theory and Practice
for the New Millenium, 8-10 September 1999, Milan, Italy},
pages = {1196--1203},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1998
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Incorporating DRAM access modes into high-level synthesis Journal Article In: IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 17, no. 2, pp. 96–109, 1998. @article{DBLP:journals/tcad/PandaDN98b,
title = {Incorporating DRAM access modes into high-level synthesis},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/43.681260},
doi = {10.1109/43.681260},
year = {1998},
date = {1998-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {17},
number = {2},
pages = {96--109},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Grun, Peter; Balasa, Florin; Dutt, Nikil D Memory size estimation for multimedia applications Proceedings Article In: Borriello, Gaetano; Jerraya, Ahmed Amine; Lavagno, Luciano (Ed.): Proceedings of the Sixth International Workshop on Hardware/Software
Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998, pp. 145–149, IEEE Computer Society, 1998. @inproceedings{DBLP:conf/codes/GrunBD98b,
title = {Memory size estimation for multimedia applications},
author = {Peter Grun and Florin Balasa and Nikil D Dutt},
editor = {Gaetano Borriello and Ahmed Amine Jerraya and Luciano Lavagno},
url = {https://doi.org/10.1145/278241.278325},
doi = {10.1145/278241.278325},
year = {1998},
date = {1998-01-01},
booktitle = {Proceedings of the Sixth International Workshop on Hardware/Software
Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998},
pages = {145--149},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Data Cache Sizing for Embedded Processor Applications Proceedings Article In: Dewilde, Patrick M; Rammig, Franz J; Musgrave, Gerry (Ed.): 1998 Design, Automation and Test in Europe (DATE '98), February
23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 925–926, IEEE Computer Society, 1998. @inproceedings{DBLP:conf/date/PandaDN98b,
title = {Data Cache Sizing for Embedded Processor Applications},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
editor = {Patrick M Dewilde and Franz J Rammig and Gerry Musgrave},
url = {https://doi.org/10.1109/DATE.1998.655972},
doi = {10.1109/DATE.1998.655972},
year = {1998},
date = {1998-01-01},
booktitle = {1998 Design, Automation and Test in Europe (DATE '98), February
23-26, 1998, Le Palais des Congrès de Paris, Paris, France},
pages = {925--926},
publisher = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Hein, Soren; Nagasamy, Vijay; Rohfleisch, Bernhard; Kozyrakis, Christoforos E; Dutt, Nikil D; Catthoor, Francky Embedded memories in system design - from technology to systems architecture Proceedings Article In: Yasuura, Hiroto (Ed.): Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998, pp. 1, ACM / IEEE Computer Society, 1998. @inproceedings{DBLP:conf/iccad/HeinNRKDC98b,
title = {Embedded memories in system design - from technology to systems architecture},
author = {Soren Hein and Vijay Nagasamy and Bernhard Rohfleisch and Christoforos E Kozyrakis and Nikil D Dutt and Francky Catthoor},
editor = {Hiroto Yasuura},
url = {https://doi.org/10.1145/288548.288549},
doi = {10.1145/288548.288549},
year = {1998},
date = {1998-01-01},
booktitle = {Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {1},
publisher = {ACM / IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D Copy Elimination for Parallelizing Compilers Proceedings Article In: Chatterjee, Siddhartha; Prins, Jan F; Carter, Larry; Ferrante, Jeanne; Li, Zhiyuan; Sehr, David C; -, Pen (Ed.): Languages and Compilers for Parallel Computing, 11th International
Workshop, LCPC'98, Chapel Hill, NC, USA, August 7-9, 1998, Proceedings, pp. 275–289, Springer, 1998. @inproceedings{DBLP:conf/lcpc/KolsonND98b,
title = {Copy Elimination for Parallelizing Compilers},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt},
editor = {Siddhartha Chatterjee and Jan F Prins and Larry Carter and Jeanne Ferrante and Zhiyuan Li and David C Sehr and Pen -},
url = {https://doi.org/10.1007/3-540-48319-5_18},
doi = {10.1007/3-540-48319-5_18},
year = {1998},
date = {1998-01-01},
booktitle = {Languages and Compilers for Parallel Computing, 11th International
Workshop, LCPC'98, Chapel Hill, NC, USA, August 7-9, 1998, Proceedings},
volume = {1656},
pages = {275--289},
publisher = {Springer},
series = {Lecture Notes in Computer Science},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1997
|
Ohm, Seong Yong; Kurdahi, Fadi J; Dutt, Nikil D A unified lower bound estimation technique for high-level synthesis Journal Article In: IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 16, no. 5, pp. 458–472, 1997. @article{DBLP:journals/tcad/OhmKD97,
title = {A unified lower bound estimation technique for high-level synthesis},
author = {Seong Yong Ohm and Fadi J Kurdahi and Nikil D Dutt},
url = {https://doi.org/10.1109/43.631209},
doi = {10.1109/43.631209},
year = {1997},
date = {1997-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {16},
number = {5},
pages = {458--472},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Memory data organization for improved cache performance in embedded
processor applications Journal Article In: ACM Trans. Design Autom. Electr. Syst., vol. 2, no. 4, pp. 384–409, 1997. @article{DBLP:journals/todaes/PandaDN97,
title = {Memory data organization for improved cache performance in embedded
processor applications},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {http://doi.acm.org/10.1145/268424.268464},
doi = {10.1145/268424.268464},
year = {1997},
date = {1997-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {2},
number = {4},
pages = {384--409},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Efficient utilization of scratch-pad memory in embedded processor
applications Proceedings Article In: European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997, pp. 7–11, 1997. @inproceedings{DBLP:conf/date/PandaDN97,
title = {Efficient utilization of scratch-pad memory in embedded processor
applications},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/EDTC.1997.582323},
doi = {10.1109/EDTC.1997.582323},
year = {1997},
date = {1997-01-01},
booktitle = {European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997},
pages = {7--11},
crossref = {DBLP:conf/date/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Jha, Pradip K; Dutt, Nikil D Library mapping for memories Proceedings Article In: European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997, pp. 288–292, 1997. @inproceedings{DBLP:conf/date/JhaD97,
title = {Library mapping for memories},
author = {Pradip K Jha and Nikil D Dutt},
url = {https://doi.org/10.1109/EDTC.1997.582372},
doi = {10.1109/EDTC.1997.582372},
year = {1997},
date = {1997-01-01},
booktitle = {European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997},
pages = {288--292},
crossref = {DBLP:conf/date/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Exploiting off-chip memory access modes in high-level synthesis Proceedings Article In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 333–340, 1997. @inproceedings{DBLP:conf/iccad/PandaDN97,
title = {Exploiting off-chip memory access modes in high-level synthesis},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ICCAD.1997.643539},
doi = {10.1109/ICCAD.1997.643539},
year = {1997},
date = {1997-01-01},
booktitle = {Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997},
pages = {333--340},
crossref = {DBLP:conf/iccad/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Nakamura, Hiroshi; Dutt, Nikil D; Nicolau, Alexandru A Data Alignment Technique for Improving Cache Performance Proceedings Article In: Proceedings 1997 International Conference on Computer Design: VLSI
in Computers & Processors, ICCD '97, Austin, Texas, USA, October
12-15, 1997, pp. 587–592, 1997. @inproceedings{DBLP:conf/iccd/PandaNDN97,
title = {A Data Alignment Technique for Improving Cache Performance},
author = {Preeti Ranjan Panda and Hiroshi Nakamura and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ICCD.1997.628925},
doi = {10.1109/ICCD.1997.628925},
year = {1997},
date = {1997-01-01},
booktitle = {Proceedings 1997 International Conference on Computer Design: VLSI
in Computers & Processors, ICCD '97, Austin, Texas, USA, October
12-15, 1997},
pages = {587--592},
crossref = {DBLP:conf/iccd/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Nakamura, Hiroshi; Dutt, Nikil D; Nicolau, Alexandru Improving cache Performance Through Tiling and Data Alignment Proceedings Article In: Solving Irregularly Structured Problems in Parallel, 4th International
Symposium, IRREGULAR '97, Paderborn, Germany, June 12-13, 1997,
Proceedings, pp. 167–185, 1997. @inproceedings{DBLP:conf/irregular/PandaNDN97,
title = {Improving cache Performance Through Tiling and Data Alignment},
author = {Preeti Ranjan Panda and Hiroshi Nakamura and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1007/3-540-63138-0_16},
doi = {10.1007/3-540-63138-0_16},
year = {1997},
date = {1997-01-01},
booktitle = {Solving Irregularly Structured Problems in Parallel, 4th International
Symposium, IRREGULAR '97, Paderborn, Germany, June 12-13, 1997,
Proceedings},
pages = {167--185},
crossref = {DBLP:conf/irregular/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Architectural Exploration and Optimization of Local Memory in Embedded
Systems Proceedings Article In: Proceedings of the 10th International Symposium on System Synthesis,
ISSS '97, Antwerp, Belgium, September 17-19, 1997., pp. 90, 1997. @inproceedings{DBLP:conf/isss/PandaDN97,
title = {Architectural Exploration and Optimization of Local Memory in Embedded
Systems},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {http://doi.ieeecomputersociety.org/10.1109/ISSS.1997.621680},
doi = {10.1109/ISSS.1997.621680},
year = {1997},
date = {1997-01-01},
booktitle = {Proceedings of the 10th International Symposium on System Synthesis,
ISSS '97, Antwerp, Belgium, September 17-19, 1997.},
pages = {90},
crossref = {DBLP:conf/isss/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D Behavioral Array Mapping into Multiport Memories Targeting Low Power Proceedings Article In: 10th International Conference on VLSI Design (VLSI Design 1997),
4-7 January 1997, Hyderabad, India, pp. 268–273, 1997. @inproceedings{DBLP:conf/vlsid/PandaD97,
title = {Behavioral Array Mapping into Multiport Memories Targeting Low Power},
author = {Preeti Ranjan Panda and Nikil D Dutt},
url = {https://doi.org/10.1109/ICVD.1997.568088},
doi = {10.1109/ICVD.1997.568088},
year = {1997},
date = {1997-01-01},
booktitle = {10th International Conference on VLSI Design (VLSI Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {268--273},
crossref = {DBLP:conf/vlsid/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1996
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D Elimination of redundant memory traffic in high-level synthesis Journal Article In: IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 15, no. 11, pp. 1354–1364, 1996. @article{DBLP:journals/tcad/KolsonND96,
title = {Elimination of redundant memory traffic in high-level synthesis},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt},
url = {https://doi.org/10.1109/43.543768},
doi = {10.1109/43.543768},
year = {1996},
date = {1996-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {15},
number = {11},
pages = {1354--1364},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D; Kennedy, Ken Optimal register assignment to loops for embedded code generation Journal Article In: ACM Trans. Design Autom. Electr. Syst., vol. 1, no. 2, pp. 251–279, 1996. @article{DBLP:journals/todaes/KolsonNDK96,
title = {Optimal register assignment to loops for embedded code generation},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt and Ken Kennedy},
url = {http://doi.acm.org/10.1145/233539.233542},
doi = {10.1145/233539.233542},
year = {1996},
date = {1996-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {1},
number = {2},
pages = {251--279},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Jha, Pradip K; Dutt, Nikil D High-level library mapping for arithmetic components Journal Article In: IEEE Trans. VLSI Syst., vol. 4, no. 2, pp. 157–169, 1996. @article{DBLP:journals/tvlsi/JhaD96,
title = {High-level library mapping for arithmetic components},
author = {Pradip K Jha and Nikil D Dutt},
url = {https://doi.org/10.1109/92.502189},
doi = {10.1109/92.502189},
year = {1996},
date = {1996-01-01},
journal = {IEEE Trans. VLSI Syst.},
volume = {4},
number = {2},
pages = {157--169},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D Reducing Address Bus Transitions for Low Power Memory Mapping Proceedings Article In: 1996 European Design and Test Conference, ED&TC 1996, Paris, France,
March 11-14, 1996, pp. 63–71, 1996. @inproceedings{DBLP:conf/date/PandaD96,
title = {Reducing Address Bus Transitions for Low Power Memory Mapping},
author = {Preeti Ranjan Panda and Nikil D Dutt},
url = {https://doi.org/10.1109/EDTC.1996.494129},
doi = {10.1109/EDTC.1996.494129},
year = {1996},
date = {1996-01-01},
booktitle = {1996 European Design and Test Conference, ED&TC 1996, Paris, France,
March 11-14, 1996},
pages = {63--71},
crossref = {DBLP:conf/date/1996},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D; Kennedy, Ken A Method for Register Allocation to Loops in Multiple Register File
Architectures Proceedings Article In: Proceedings of IPPS '96, The 10th International Parallel Processing
Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 28–33, 1996. @inproceedings{DBLP:conf/ipps/KolsonNDK96,
title = {A Method for Register Allocation to Loops in Multiple Register File
Architectures},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt and Ken Kennedy},
url = {https://doi.org/10.1109/IPPS.1996.508035},
doi = {10.1109/IPPS.1996.508035},
year = {1996},
date = {1996-01-01},
booktitle = {Proceedings of IPPS '96, The 10th International Parallel Processing
Symposium, April 15-19, 1996, Honolulu, Hawaii, USA},
pages = {28--33},
crossref = {DBLP:conf/ipps/1996},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D Low-power mapping of behavioral arrays to multiple memories Proceedings Article In: Proceedings of the 1996 International Symposium on Low Power Electronics
and Design, 1996, Monterey, California, USA, August 12-14, 1996, pp. 289–292, 1996. @inproceedings{DBLP:conf/islped/PandaD96,
title = {Low-power mapping of behavioral arrays to multiple memories},
author = {Preeti Ranjan Panda and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/252493.252621},
doi = {10.1145/252493.252621},
year = {1996},
date = {1996-01-01},
booktitle = {Proceedings of the 1996 International Symposium on Low Power Electronics
and Design, 1996, Monterey, California, USA, August 12-14, 1996},
pages = {289--292},
crossref = {DBLP:conf/islped/1996},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Memory Organization for Improved Data Cache Performance in Embedded
Processors Proceedings Article In: Proceedings of the 9th International Symposium on System Synthesis,
ISSS '96, San Diego, CA, USA, November 6-8, 1996., pp. 90–95, 1996. @inproceedings{DBLP:conf/isss/PandaDN96,
title = {Memory Organization for Improved Data Cache Performance in Embedded
Processors},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ISSS.1996.565886},
doi = {10.1109/ISSS.1996.565886},
year = {1996},
date = {1996-01-01},
booktitle = {Proceedings of the 9th International Symposium on System Synthesis,
ISSS '96, San Diego, CA, USA, November 6-8, 1996.},
pages = {90--95},
crossref = {DBLP:conf/isss/1996},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1995
|
Capitanio, Andrea; Nicolau, Alexandru; Dutt, Nikil D A hypergraph-based model for port allocation on multiple-register-file
VLIW architectures Journal Article In: International Journal of Parallel Programming, vol. 23, no. 6, pp. 499–513, 1995. @article{DBLP:journals/ijpp/CapitanioND95,
title = {A hypergraph-based model for port allocation on multiple-register-file
VLIW architectures},
author = {Andrea Capitanio and Alexandru Nicolau and Nikil D Dutt},
url = {https://doi.org/10.1007/BF02577864},
doi = {10.1007/BF02577864},
year = {1995},
date = {1995-01-01},
journal = {International Journal of Parallel Programming},
volume = {23},
number = {6},
pages = {499--513},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Jha, Pradip K; Dutt, Nikil D; Parameswaran, Sri Reclocking for high-level synthesis Proceedings Article In: Proceedings of the 1995 Conference on Asia Pacific Design Automation,
Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995, 1995. @inproceedings{DBLP:conf/aspdac/JhaDP95,
title = {Reclocking for high-level synthesis},
author = {Pradip K Jha and Nikil D Dutt and Sri Parameswaran},
url = {https://doi.org/10.1145/224818.224839},
doi = {10.1145/224818.224839},
year = {1995},
date = {1995-01-01},
booktitle = {Proceedings of the 1995 Conference on Asia Pacific Design Automation,
Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995},
crossref = {DBLP:conf/aspdac/1995},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Jha, Pradip K; Dutt, Nikil D Design reuse through high-level library mapping Proceedings Article In: 1995 European Design and Test Conference, ED&TC 1995, Paris, France,
March 6-9, 1995, pp. 345–350, 1995. @inproceedings{DBLP:conf/date/JhaD95,
title = {Design reuse through high-level library mapping},
author = {Pradip K Jha and Nikil D Dutt},
url = {https://doi.org/10.1109/EDTC.1995.470373},
doi = {10.1109/EDTC.1995.470373},
year = {1995},
date = {1995-01-01},
booktitle = {1995 European Design and Test Conference, ED&TC 1995, Paris, France,
March 6-9, 1995},
pages = {345--350},
crossref = {DBLP:conf/date/1995},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Onion, Frederick; Nicolau, Alexandru; Dutt, Nikil D Incorporating compiler feedback into the design of ASIPs Proceedings Article In: 1995 European Design and Test Conference, ED&TC 1995, Paris, France,
March 6-9, 1995, pp. 508–515, 1995. @inproceedings{DBLP:conf/date/OnionND95,
title = {Incorporating compiler feedback into the design of ASIPs},
author = {Frederick Onion and Alexandru Nicolau and Nikil D Dutt},
url = {https://doi.org/10.1109/EDTC.1995.470353},
doi = {10.1109/EDTC.1995.470353},
year = {1995},
date = {1995-01-01},
booktitle = {1995 European Design and Test Conference, ED&TC 1995, Paris, France,
March 6-9, 1995},
pages = {508--515},
crossref = {DBLP:conf/date/1995},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D; Kennedy, Ken Optimal register assignment to loops for embedded code generation Proceedings Article In: Proceedings of the 8th International Symposium on System Synthesis
(ISSS 1995), September 13-15, 1995, Cannes, France, pp. 42–47, 1995. @inproceedings{DBLP:conf/isss/KolsonNDK95,
title = {Optimal register assignment to loops for embedded code generation},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt and Ken Kennedy},
url = {http://doi.acm.org/10.1145/224486.224494},
doi = {10.1145/224486.224494},
year = {1995},
date = {1995-01-01},
booktitle = {Proceedings of the 8th International Symposium on System Synthesis
(ISSS 1995), September 13-15, 1995, Cannes, France},
pages = {42--47},
crossref = {DBLP:conf/isss/1995},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Ohm, Seong Yong; Kurdahi, Fadi J; Dutt, Nikil D; Xu, Min A comprehensive estimation technique for high-level synthesis Proceedings Article In: Proceedings of the 8th International Symposium on System Synthesis
(ISSS 1995), September 13-15, 1995, Cannes, France, pp. 122–127, 1995. @inproceedings{DBLP:conf/isss/OhmKDX95,
title = {A comprehensive estimation technique for high-level synthesis},
author = {Seong Yong Ohm and Fadi J Kurdahi and Nikil D Dutt and Min Xu},
url = {http://doi.acm.org/10.1145/224486.224528},
doi = {10.1145/224486.224528},
year = {1995},
date = {1995-01-01},
booktitle = {Proceedings of the 8th International Symposium on System Synthesis
(ISSS 1995), September 13-15, 1995, Cannes, France},
pages = {122--127},
crossref = {DBLP:conf/isss/1995},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D 1995 high level synthesis design repository Proceedings Article In: Proceedings of the 8th International Symposium on System Synthesis
(ISSS 1995), September 13-15, 1995, Cannes, France, pp. 170–174, 1995. @inproceedings{DBLP:conf/isss/PandaD95,
title = {1995 high level synthesis design repository},
author = {Preeti Ranjan Panda and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/224486.224537},
doi = {10.1145/224486.224537},
year = {1995},
date = {1995-01-01},
booktitle = {Proceedings of the 8th International Symposium on System Synthesis
(ISSS 1995), September 13-15, 1995, Cannes, France},
pages = {170--174},
crossref = {DBLP:conf/isss/1995},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1994
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D Minimization of Memory Traffic in High-Level Synthesis Proceedings Article In: Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994., pp. 149–154, 1994. @inproceedings{DBLP:conf/dac/KolsonND94,
title = {Minimization of Memory Traffic in High-Level Synthesis},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/196244.196316},
doi = {10.1145/196244.196316},
year = {1994},
date = {1994-01-01},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994.},
pages = {149--154},
crossref = {DBLP:conf/dac/1994},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Agnew, David; Camposano, Raul; Domic, Antun; Wiesel, Manfred; Yasuura, Hiroto Design Reuse: Fact or Fiction? (Panel) Proceedings Article In: Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994., pp. 562, 1994. @inproceedings{DBLP:conf/dac/DuttACDWY94,
title = {Design Reuse: Fact or Fiction? (Panel)},
author = {Nikil D Dutt and David Agnew and Raul Camposano and Antun Domic and Manfred Wiesel and Hiroto Yasuura},
url = {http://doi.acm.org/10.1145/196244.196555},
doi = {10.1145/196244.196555},
year = {1994},
date = {1994-01-01},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994.},
pages = {562},
crossref = {DBLP:conf/dac/1994},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Novack, Steven; Nicolau, Alexandru; Dutt, Nikil D A Unified code generation approach using mutation scheduling Proceedings Article In: Code Generation for Embedded Processors [Dagstuhl Workshop, August
31 - September 2, 1994], pp. 203–218, 1994. @inproceedings{DBLP:conf/dagstuhl/NovackND94,
title = {A Unified code generation approach using mutation scheduling},
author = {Steven Novack and Alexandru Nicolau and Nikil D Dutt},
year = {1994},
date = {1994-01-01},
booktitle = {Code Generation for Embedded Processors [Dagstuhl Workshop, August
31 - September 2, 1994]},
pages = {203--218},
crossref = {DBLP:conf/dagstuhl/1994code},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
