2018
|
Sagdighi, Armin; Donyanavard, Bryan; Kadeed, Thawra; Moazzemi, Kasra; Mück, Tiago; Nassar, Ahmed; Rahmani, Amir M.; Wild, Thomas; Dutt, Nikil; Ernst, Rolf; Herkersdorf, Andreas; Kurdahi, Fadi Design Methodologies for Enabling Self-awareness in Autonomous Systems Conference 2018 Design, Automation Test in Europe Conference Exhibition (DATE), 2018, ISSN: 1558-1101. @conference{8342259,
title = {Design Methodologies for Enabling Self-awareness in Autonomous Systems},
author = {Armin Sagdighi and Bryan Donyanavard and Thawra Kadeed and Kasra Moazzemi and Tiago Mück and Ahmed Nassar and Amir M. Rahmani and Thomas Wild and Nikil Dutt and Rolf Ernst and Andreas Herkersdorf and Fadi Kurdahi},
url = {https://doi.org/10.23919/DATE.2018.8342259},
doi = {10.23919/DATE.2018.8342259},
issn = {1558-1101},
year = {2018},
date = {2018-03-19},
booktitle = {2018 Design, Automation Test in Europe Conference Exhibition (DATE)},
pages = {1532-1537},
abstract = {This paper deals with challenges and possible solutions for incorporating self-awareness principles in EDA design flows for autonomous systems. We present a holistic approach that enables self-awareness across the software/hardware stack, from systems-on-chip to systems-of-systems (autonomous car) contexts. We use the Information Processing Factory (IPF) metaphor as an exemplar to show how self-awareness can be achieved across multiple abstraction levels, and discuss new research challenges. The IPF approach represents a paradigm shift in platform design by envisioning the move towards a consequent platform-centric design in which the combination of self-organizing learning and formal reactive methods guarantee the applicability of such cyber-physical systems in safety-critical and high-availability applications.
},
keywords = {},
pubstate = {published},
tppubtype = {conference}
}
This paper deals with challenges and possible solutions for incorporating self-awareness principles in EDA design flows for autonomous systems. We present a holistic approach that enables self-awareness across the software/hardware stack, from systems-on-chip to systems-of-systems (autonomous car) contexts. We use the Information Processing Factory (IPF) metaphor as an exemplar to show how self-awareness can be achieved across multiple abstraction levels, and discuss new research challenges. The IPF approach represents a paradigm shift in platform design by envisioning the move towards a consequent platform-centric design in which the combination of self-organizing learning and formal reactive methods guarantee the applicability of such cyber-physical systems in safety-critical and high-availability applications.
|
Donyanavard, Bryan; Rahmani, Amir M.; Mück, Tiago; Moazzemi, Kasra; Dutt, Nikil Gain Scheduled Control for Nonlinear Power Management in CMPs Conference 2018 Design, Automation Test in Europe Conference Exhibition (DATE), 2018. @conference{8342141,
title = {Gain Scheduled Control for Nonlinear Power Management in CMPs},
author = {Bryan Donyanavard and Amir M. Rahmani and Tiago Mück and Kasra Moazzemi and Nikil Dutt},
url = {https://doi.org/10.23919/DATE.2018.8342141},
doi = {10.23919/DATE.2018.8342141},
year = {2018},
date = {2018-03-19},
booktitle = {2018 Design, Automation Test in Europe Conference Exhibition (DATE)},
pages = {921-924},
abstract = {Dynamic voltage and frequency scaling (DVFS) is a well-established technique for power management of thermal-or energy-sensitive chip multiprocessors (CMPs). In this context, linear control theoretic solutions have been successfully implemented to control the voltage-frequency knobs. However, modern CMPs with a large range of operating frequencies and multiple voltage levels display nonlinear behavior in the relationship between frequency and power. State-of-the-art linear controllers therefore under-optimize DVFS operation. We propose a Gain Scheduled Controller (GSC) for nonlinear runtime power management of CMPs that simplifies the controller implementation of systems with varying dynamic properties by utilizing an adaptive control theoretic approach in conjunction with static linear controllers. Our design improves the accuracy of the controller over a static linear controller with minimal overhead. We implement our approach on an Exynos platform containing ARM's big.LITTLE-based heterogeneous multi-processor (HMP) and demonstrate that the system's response to changes in target power is improved by 2x while operating up to 12% more efficiently for tracking accuracy.},
keywords = {},
pubstate = {published},
tppubtype = {conference}
}
Dynamic voltage and frequency scaling (DVFS) is a well-established technique for power management of thermal-or energy-sensitive chip multiprocessors (CMPs). In this context, linear control theoretic solutions have been successfully implemented to control the voltage-frequency knobs. However, modern CMPs with a large range of operating frequencies and multiple voltage levels display nonlinear behavior in the relationship between frequency and power. State-of-the-art linear controllers therefore under-optimize DVFS operation. We propose a Gain Scheduled Controller (GSC) for nonlinear runtime power management of CMPs that simplifies the controller implementation of systems with varying dynamic properties by utilizing an adaptive control theoretic approach in conjunction with static linear controllers. Our design improves the accuracy of the controller over a static linear controller with minimal overhead. We implement our approach on an Exynos platform containing ARM's big.LITTLE-based heterogeneous multi-processor (HMP) and demonstrate that the system's response to changes in target power is improved by 2x while operating up to 12% more efficiently for tracking accuracy. |
Betemps, Carlos Michel; Melo, Mateus Santos De; Rahmani, Amir M; Miele, Antonio; Dutt, Nikil D; Zatt, Bruno Exploring Heterogeneous Task-Level Parallelism in a BMA Video Coding
Application using System-Level Simulation Proceedings Article In: VIII Brazilian Symposium on Computing Systems Engineering, SBESC
2018, Salvador, Brazil, November 5-8, 2018, pp. 75–82, IEEE, 2018. @inproceedings{DBLP:conf/sbesc/BetempsMRMDZ18,
title = {Exploring Heterogeneous Task-Level Parallelism in a BMA Video Coding
Application using System-Level Simulation},
author = {Carlos Michel Betemps and Mateus Santos De Melo and Amir M Rahmani and Antonio Miele and Nikil D Dutt and Bruno Zatt},
url = {https://doi.org/10.1109/SBESC.2018.00020},
doi = {10.1109/SBESC.2018.00020},
year = {2018},
date = {2018-01-01},
booktitle = {VIII Brazilian Symposium on Computing Systems Engineering, SBESC
2018, Salvador, Brazil, November 5-8, 2018},
pages = {75--82},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mück, Tiago; Fröhlich, Antonio A.; Gracioli, Giovani; Rahmani, Amir M; Reis, João Gabriel; Dutt, Nikil D CHIPS-AHOy: a predictable holistic cyber-physical hypervisor for MPSoCs Proceedings Article In: Mudge, Trevor N; Pnevmatikatos, Dionisios N (Ed.): Proceedings of the 18th International Conference on Embedded Computer
Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece,
July 15-19, 2018, pp. 73–80, ACM, 2018. @inproceedings{DBLP:conf/samos/MuckFGRRD18,
title = {CHIPS-AHOy: a predictable holistic cyber-physical hypervisor for MPSoCs},
author = {Tiago Mück and Antonio A. Fröhlich and Giovani Gracioli and Amir M Rahmani and João Gabriel Reis and Nikil D Dutt},
editor = {Trevor N Mudge and Dionisios N Pnevmatikatos},
url = {https://doi.org/10.1145/3229631.3229642},
doi = {10.1145/3229631.3229642},
year = {2018},
date = {2018-01-01},
booktitle = {Proceedings of the 18th International Conference on Embedded Computer
Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece,
July 15-19, 2018},
pages = {73--80},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Shamsa, Elham; Kanduri, Anil; Rahmani, Amir M; Liljeberg, Pasi; Jantsch, Axel; Dutt, Nikil D Goal Formulation: Abstracting Dynamic Objectives for Efficient On-chip
Resource Allocation Proceedings Article In: Nurmi, Jari; Ellervee, Peeter; Mihhailov, Juri; Jenihhin, Maksim; ä, Kalle Tammem (Ed.): 2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018:
NORCHIP and International Symposium of System-on-Chip (SoC), Tallinn,
Estonia, October 30-31, 2018, pp. 1–4, IEEE, 2018. @inproceedings{DBLP:conf/norchip/ShamsaKRLJD18,
title = {Goal Formulation: Abstracting Dynamic Objectives for Efficient On-chip
Resource Allocation},
author = {Elham Shamsa and Anil Kanduri and Amir M Rahmani and Pasi Liljeberg and Axel Jantsch and Nikil D Dutt},
editor = {Jari Nurmi and Peeter Ellervee and Juri Mihhailov and Maksim Jenihhin and Kalle Tammem ä},
url = {https://doi.org/10.1109/NORCHIP.2018.8573451},
doi = {10.1109/NORCHIP.2018.8573451},
year = {2018},
date = {2018-01-01},
booktitle = {2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018:
NORCHIP and International Symposium of System-on-Chip (SoC), Tallinn,
Estonia, October 30-31, 2018},
pages = {1--4},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Jantsch, Axel; Anzanpour, Arman; Kholerdi, Hedyeh A; Azimi, Iman; Siafara, Lydia C; Rahmani, Amir M; Taherinejad, Nima; Liljeberg, Pasi; Dutt, Nikil D Hierarchical dynamic goal management for IoT systems Proceedings Article In: 19th International Symposium on Quality Electronic Design, ISQED
2018, Santa Clara, CA, USA, March 13-14, 2018, pp. 370–375, IEEE, 2018. @inproceedings{DBLP:conf/isqed/JantschAKASRTLD18,
title = {Hierarchical dynamic goal management for IoT systems},
author = {Axel Jantsch and Arman Anzanpour and Hedyeh A Kholerdi and Iman Azimi and Lydia C Siafara and Amir M Rahmani and Nima Taherinejad and Pasi Liljeberg and Nikil D Dutt},
url = {https://doi.org/10.1109/ISQED.2018.8357315},
doi = {10.1109/ISQED.2018.8357315},
year = {2018},
date = {2018-01-01},
booktitle = {19th International Symposium on Quality Electronic Design, ISQED
2018, Santa Clara, CA, USA, March 13-14, 2018},
pages = {370--375},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D Self-Awareness for Heterogeneous MPSoCs: A Case Study using Adaptive,
Reflective Middleware Proceedings Article In: Chen, Deming; Homayoun, Houman; Taskin, Baris (Ed.): Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI
2018, Chicago, IL, USA, May 23-25, 2018, pp. 3, ACM, 2018. @inproceedings{DBLP:conf/glvlsi/Dutt18,
title = {Self-Awareness for Heterogeneous MPSoCs: A Case Study using Adaptive,
Reflective Middleware},
author = {Nikil D Dutt},
editor = {Deming Chen and Houman Homayoun and Baris Taskin},
url = {https://doi.org/10.1145/3194554.3200203},
doi = {10.1145/3194554.3200203},
year = {2018},
date = {2018-01-01},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {3},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Kanduri, Anil; Miele, Antonio; Rahmani, Amir M; Liljeberg, Pasi; Bolchini, Cristiana; Dutt, Nikil D Approximation-aware coordinated power/performance management for heterogeneous
multi-cores Proceedings Article In: Proceedings of the 55th Annual Design Automation Conference, DAC
2018, San Francisco, CA, USA, June 24-29, 2018, pp. 68:1–68:6, ACM, 2018. @inproceedings{DBLP:conf/dac/KanduriMRLBD18,
title = {Approximation-aware coordinated power/performance management for heterogeneous
multi-cores},
author = {Anil Kanduri and Antonio Miele and Amir M Rahmani and Pasi Liljeberg and Cristiana Bolchini and Nikil D Dutt},
url = {https://doi.org/10.1145/3195970.3195994},
doi = {10.1145/3195970.3195994},
year = {2018},
date = {2018-01-01},
booktitle = {Proceedings of the 55th Annual Design Automation Conference, DAC
2018, San Francisco, CA, USA, June 24-29, 2018},
pages = {68:1--68:6},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mück, Tiago; Donyanavard, Bryan; Moazzemi, Kasra; Rahmani, Amir M; Jantsch, Axel; Dutt, Nikil D Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores Journal Article In: IEEE Trans. Multi Scale Comput. Syst., vol. 4, no. 4, pp. 944–951, 2018. @article{DBLP:journals/tmscs/MuckDMRJD18,
title = {Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores},
author = {Tiago Mück and Bryan Donyanavard and Kasra Moazzemi and Amir M Rahmani and Axel Jantsch and Nikil D Dutt},
url = {https://doi.org/10.1109/TMSCS.2018.2808524},
doi = {10.1109/TMSCS.2018.2808524},
year = {2018},
date = {2018-01-01},
journal = {IEEE Trans. Multi Scale Comput. Syst.},
volume = {4},
number = {4},
pages = {944--951},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Shoushtari, Majid; Donyanavard, Bryan; Bathen, Luis Angel D; Dutt, Nikil D ShaVe-ICE: Sharing Distributed Virtualized SPMs in Many-Core Embedded
Systems Journal Article In: ACM Trans. Embed. Comput. Syst., vol. 17, no. 2, pp. 47:1–47:25, 2018. @article{DBLP:journals/tecs/ShoushtariDBD18,
title = {ShaVe-ICE: Sharing Distributed Virtualized SPMs in Many-Core Embedded
Systems},
author = {Majid Shoushtari and Bryan Donyanavard and Luis Angel D Bathen and Nikil D Dutt},
url = {https://doi.org/10.1145/3157667},
doi = {10.1145/3157667},
year = {2018},
date = {2018-01-01},
journal = {ACM Trans. Embed. Comput. Syst.},
volume = {17},
number = {2},
pages = {47:1--47:25},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Park, Jurn-Gyu; Hsieh, Chen-Ying; Dutt, Nikil D; Lim, Sung-Soo Synergistic CPU-GPU Frequency Capping for Energy-Efficient Mobile Games Journal Article In: ACM Trans. Embed. Comput. Syst., vol. 17, no. 2, pp. 45:1–45:24, 2018. @article{DBLP:journals/tecs/ParkHDL18,
title = {Synergistic CPU-GPU Frequency Capping for Energy-Efficient Mobile Games},
author = {Jurn-Gyu Park and Chen-Ying Hsieh and Nikil D Dutt and Sung-Soo Lim},
url = {https://doi.org/10.1145/3145337},
doi = {10.1145/3145337},
year = {2018},
date = {2018-01-01},
journal = {ACM Trans. Embed. Comput. Syst.},
volume = {17},
number = {2},
pages = {45:1--45:24},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Liu, Weichen; Yang, Lei; Jiang, Weiwen; Feng, Liang; Guan, Nan; Zhang, Wei; Dutt, Nikil D Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip
Based Multiprocessor System-on-Chip Journal Article In: IEEE Trans. Computers, vol. 67, no. 12, pp. 1818–1834, 2018. @article{DBLP:journals/tc/LiuYJFGZD18,
title = {Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip
Based Multiprocessor System-on-Chip},
author = {Weichen Liu and Lei Yang and Weiwen Jiang and Liang Feng and Nan Guan and Wei Zhang and Nikil D Dutt},
url = {https://doi.org/10.1109/TC.2018.2844365},
doi = {10.1109/TC.2018.2844365},
year = {2018},
date = {2018-01-01},
journal = {IEEE Trans. Computers},
volume = {67},
number = {12},
pages = {1818--1834},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
ö, Mischa M; Schlatow, Johannes; Ernst, Rolf; Dutt, Nikil D; Nassar, Ahmed; Rahmani, Amir M; Kurdahi, Fadi J; Wild, Thomas; Sadighi, Armin; Herkersdorf, Andreas Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS Journal Article In: Proceedings of the IEEE, vol. 106, no. 9, pp. 1543–1567, 2018. @article{DBLP:journals/pieee/MostlSEDNRKWSH18,
title = {Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS},
author = {Mischa M ö and Johannes Schlatow and Rolf Ernst and Nikil D Dutt and Ahmed Nassar and Amir M Rahmani and Fadi J Kurdahi and Thomas Wild and Armin Sadighi and Andreas Herkersdorf},
url = {https://doi.org/10.1109/JPROC.2018.2858023},
doi = {10.1109/JPROC.2018.2858023},
year = {2018},
date = {2018-01-01},
journal = {Proceedings of the IEEE},
volume = {106},
number = {9},
pages = {1543--1567},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Das, Anup; Pradhapan, Paruthi; Groenendaal, Willemijn; Adiraju, Prathyusha; Rajan, Raj Thilak; Catthoor, Francky; Schaafsma, Siebren; Krichmar, Jeffrey L; Dutt, Nikil D; Hoof, Chris Van Unsupervised heart-rate estimation in wearables with Liquid states
and a probabilistic readout Journal Article In: Neural Networks, vol. 99, pp. 134–147, 2018. @article{DBLP:journals/nn/DasPGARCSKDH18,
title = {Unsupervised heart-rate estimation in wearables with Liquid states
and a probabilistic readout},
author = {Anup Das and Paruthi Pradhapan and Willemijn Groenendaal and Prathyusha Adiraju and Raj Thilak Rajan and Francky Catthoor and Siebren Schaafsma and Jeffrey L Krichmar and Nikil D Dutt and Chris Van Hoof},
url = {https://doi.org/10.1016/j.neunet.2017.12.015},
doi = {10.1016/j.neunet.2017.12.015},
year = {2018},
date = {2018-01-01},
journal = {Neural Networks},
volume = {99},
pages = {134--147},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Shahhosseini, Sina; Moazzemi, Kasra; Rahmani, Amir M; Dutt, Nikil D On the feasibility of SISO control-theoretic DVFS for power capping
in CMPs Journal Article In: Microprocess. Microsystems, vol. 63, pp. 249–258, 2018. @article{DBLP:journals/mam/ShahhosseiniMRD18,
title = {On the feasibility of SISO control-theoretic DVFS for power capping
in CMPs},
author = {Sina Shahhosseini and Kasra Moazzemi and Amir M Rahmani and Nikil D Dutt},
url = {https://doi.org/10.1016/j.micpro.2018.09.012},
doi = {10.1016/j.micpro.2018.09.012},
year = {2018},
date = {2018-01-01},
journal = {Microprocess. Microsystems},
volume = {63},
pages = {249--258},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Rahmani, Amir M; Jantsch, Axel; Dutt, Nikil D HDGM: Hierarchical Dynamic Goal Management for Many-Core Resource
Allocation Journal Article In: IEEE Embed. Syst. Lett., vol. 10, no. 3, pp. 61–64, 2018. @article{DBLP:journals/esl/RahmaniJD18,
title = {HDGM: Hierarchical Dynamic Goal Management for Many-Core Resource
Allocation},
author = {Amir M Rahmani and Axel Jantsch and Nikil D Dutt},
url = {https://doi.org/10.1109/LES.2017.2751522},
doi = {10.1109/LES.2017.2751522},
year = {2018},
date = {2018-01-01},
journal = {IEEE Embed. Syst. Lett.},
volume = {10},
number = {3},
pages = {61--64},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Dutt, Nikil D; Jantsch, Axel Guest Editorial: Special Issue on Self-Aware Systems on Chip Journal Article In: IEEE Des. Test, vol. 35, no. 5, pp. 5–6, 2018. @article{DBLP:journals/dt/DuttJ18,
title = {Guest Editorial: Special Issue on Self-Aware Systems on Chip},
author = {Nikil D Dutt and Axel Jantsch},
url = {https://doi.org/10.1109/MDAT.2017.2766604},
doi = {10.1109/MDAT.2017.2766604},
year = {2018},
date = {2018-01-01},
journal = {IEEE Des. Test},
volume = {35},
number = {5},
pages = {5--6},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Hsieh, Chen-Ying; Park, Jurn-Gyu; Dutt, Nikil D; Lim, Sung-Soo MEMCOP: memory-aware co-operative power management governor for mobile games Journal Article In: Design Autom. for Emb. Sys., vol. 22, no. 1-2, pp. 95–116, 2018. @article{DBLP:journals/dafes/HsiehPDL18,
title = {MEMCOP: memory-aware co-operative power management governor for mobile games},
author = {Chen-Ying Hsieh and Jurn-Gyu Park and Nikil D Dutt and Sung-Soo Lim},
url = {https://doi.org/10.1007/s10617-018-9201-8},
doi = {10.1007/s10617-018-9201-8},
year = {2018},
date = {2018-01-01},
journal = {Design Autom. for Emb. Sys.},
volume = {22},
number = {1-2},
pages = {95--116},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Kashyap, Hirak J; Detorakis, Georgios; Dutt, Nikil; Krichmar, Jeffrey L; Neftci, Emre A Recurrent Neural Network Based Model of Predictive Smooth Pursuit Eye Movement in Primates Conference International Joint Conference on Neural Networks (IJCNN), 2018. @conference{kashyaprecurrent,
title = {A Recurrent Neural Network Based Model of Predictive Smooth Pursuit Eye Movement in Primates},
author = {Hirak J Kashyap and Georgios Detorakis and Nikil Dutt and Jeffrey L Krichmar and Emre Neftci},
url = {http://www.socsci.uci.edu/~jkrichma/Kashyap-PredicitvePursuit-IJCNN2018.pdf, paper},
year = {2018},
date = {2018-01-01},
booktitle = {International Joint Conference on Neural Networks (IJCNN)},
keywords = {},
pubstate = {published},
tppubtype = {conference}
}
|
Chou, Ting-Shuo; Kashyap, Hirak J; Xing, Jinwei; Listopad, Stanislav; Rounds, Emily L CARLsim 4: An Open Source Library for Large Scale, Biologically Detailed Spiking Neural Network Simulation using Heterogeneous Clusters Conference International Joint Conference on Neural Networks (IJCNN), 2018. @conference{choucarlsim,
title = {CARLsim 4: An Open Source Library for Large Scale, Biologically Detailed Spiking Neural Network Simulation using Heterogeneous Clusters},
author = {Ting-Shuo Chou and Hirak J Kashyap and Jinwei Xing and Stanislav Listopad and Emily L Rounds},
url = {http://www.socsci.uci.edu/~jkrichma/Chou-Kashyap-CARLsim4-IJCNN2018.pdf, paper},
year = {2018},
date = {2018-01-01},
booktitle = {International Joint Conference on Neural Networks (IJCNN)},
keywords = {},
pubstate = {published},
tppubtype = {conference}
}
|
Nejatollahi, Hamid; Dutt, Nikil; Banerjee, Indranil; Cammarota, Rosario Domain-specific Accelerators for Ideal Lattice-based Public Key Protocols Miscellaneous Cryptology ePrint Archive, Report 2018/608, 2018, (urlhttps://eprint.iacr.org/2018/608). @misc{cryptoeprint:2018:608,
title = {Domain-specific Accelerators for Ideal Lattice-based Public Key Protocols},
author = {Hamid Nejatollahi and Nikil Dutt and Indranil Banerjee and Rosario Cammarota},
url = {https://eprint.iacr.org/2018/608.pdf},
year = {2018},
date = {2018-01-01},
abstract = {Post Quantum Lattice-Based Cryptography (LBC) schemes are increasingly gaining attention in traditional and emerging security problems, such as encryption, digital signature, key exchange, homomorphic encryption etc, to address security needs of both short and long-lived devices — due to their foundational properties and ease of implementation. However, LBC schemes induce higher computational demand compared to classic schemes (e.g., DSA, ECDSA) for equivalent security guarantees, making domain-specific acceleration a viable option for improving security and favor early adoption of LBC schemes by the semiconductor industry. In this paper, we present a workflow to explore the design space of domain-specific accelerators for LBC schemes, to target a diverse set of host devices, from resource-constrained IoT devices to high-performance computing platforms. We present design exploration results on workloads executing NewHope and BLISSB-I schemes accelerated by our domain-specific accelerators, with respect to a baseline without acceleration. We show that achieved performance with acceleration makes the execution of NewHope and BLISSB-I comparable to classic key exchange and digital signature schemes while retaining some form of general purpose programmability. In addition to 44% and 67% improvement in energy-delay product (EDP), we enhance performance (cycles) of the sign and verify steps in BLISSB-I schemes by 24% and 47%, respectively. Performance (EDP) improvement of server and client side of the NewHope key exchange is improved by 37% and 33% (52% and 48%), demonstrating the utility of the design space exploration framework.
},
howpublished = {Cryptology ePrint Archive, Report 2018/608},
note = {urlhttps://eprint.iacr.org/2018/608},
keywords = {},
pubstate = {published},
tppubtype = {misc}
}
Post Quantum Lattice-Based Cryptography (LBC) schemes are increasingly gaining attention in traditional and emerging security problems, such as encryption, digital signature, key exchange, homomorphic encryption etc, to address security needs of both short and long-lived devices — due to their foundational properties and ease of implementation. However, LBC schemes induce higher computational demand compared to classic schemes (e.g., DSA, ECDSA) for equivalent security guarantees, making domain-specific acceleration a viable option for improving security and favor early adoption of LBC schemes by the semiconductor industry. In this paper, we present a workflow to explore the design space of domain-specific accelerators for LBC schemes, to target a diverse set of host devices, from resource-constrained IoT devices to high-performance computing platforms. We present design exploration results on workloads executing NewHope and BLISSB-I schemes accelerated by our domain-specific accelerators, with respect to a baseline without acceleration. We show that achieved performance with acceleration makes the execution of NewHope and BLISSB-I comparable to classic key exchange and digital signature schemes while retaining some form of general purpose programmability. In addition to 44% and 67% improvement in energy-delay product (EDP), we enhance performance (cycles) of the sign and verify steps in BLISSB-I schemes by 24% and 47%, respectively. Performance (EDP) improvement of server and client side of the NewHope key exchange is improved by 37% and 33% (52% and 48%), demonstrating the utility of the design space exploration framework.
|
2017
|
Nejatollahi, Hamid; Dutt, Nikil; Cammarota, Rosario Trends, Challenges and Needs for Lattice-based Cryptography Implementations: Special Session Proceedings Article In: Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, pp. 6:1–6:3, ACM, Seoul, Republic of Korea, 2017, ISBN: 978-1-4503-5185-0. @inproceedings{Nejatollahi:2017:TCN:3125502.3125559,
title = {Trends, Challenges and Needs for Lattice-based Cryptography Implementations: Special Session},
author = {Hamid Nejatollahi and Nikil Dutt and Rosario Cammarota},
url = {http://doi.acm.org/10.1145/3125502.3125559},
doi = {10.1145/3125502.3125559},
isbn = {978-1-4503-5185-0},
year = {2017},
date = {2017-10-15},
booktitle = {Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion},
pages = {6:1--6:3},
publisher = {ACM},
address = {Seoul, Republic of Korea},
series = {CODES '17},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Azimi, Iman; Anzanpour, Arman; Rahmani, Amir M; Pahikkala, Tapio; Levorato, Marco; Liljeberg, Pasi; Dutt, Nikil D HiCH: Hierarchical Fog-Assisted Computing Architecture for Healthcare IoT Journal Article In: ACM Trans. Embedded Comput. Syst., vol. 16, no. 5, pp. 174:1–174:20, 2017. @article{DBLP:journals/tecs/AzimiARPLLD17,
title = {HiCH: Hierarchical Fog-Assisted Computing Architecture for Healthcare IoT},
author = {Iman Azimi and Arman Anzanpour and Amir M Rahmani and Tapio Pahikkala and Marco Levorato and Pasi Liljeberg and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/3126501},
doi = {10.1145/3126501},
year = {2017},
date = {2017-01-01},
journal = {ACM Trans. Embedded Comput. Syst.},
volume = {16},
number = {5},
pages = {174:1--174:20},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Park, Young-Hwan; Khajeh, Amin; Shin, Jun Yong; Kurdahi, Fadi J; Eltawil, Ahmed M; Dutt, Nikil D Microarchitecture-Level SoC Design Book Section In: Ha, Soonhoi; ü, J (Ed.): Handbook of Hardware/Software Codesign, pp. 867–913, Springer, 2017. @incollection{DBLP:reference/hwswco/ParkKSKED17,
title = {Microarchitecture-Level SoC Design},
author = {Young-Hwan Park and Amin Khajeh and Jun Yong Shin and Fadi J Kurdahi and Ahmed M Eltawil and Nikil D Dutt},
editor = {Soonhoi Ha and J ü},
url = {https://doi.org/10.1007/978-94-017-7267-9_28},
doi = {10.1007/978-94-017-7267-9_28},
year = {2017},
date = {2017-01-01},
booktitle = {Handbook of Hardware/Software Codesign},
pages = {867--913},
publisher = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {incollection}
}
|
Sarma, Santanu; Dutt, Nikil D Architecture and Cross-Layer Design Space Exploration Book Section In: Ha, Soonhoi; ü, J (Ed.): Handbook of Hardware/Software Codesign, pp. 247–270, Springer, 2017. @incollection{DBLP:reference/hwswco/SarmaD17,
title = {Architecture and Cross-Layer Design Space Exploration},
author = {Santanu Sarma and Nikil D Dutt},
editor = {Soonhoi Ha and J ü},
url = {https://doi.org/10.1007/978-94-017-7267-9_9},
doi = {10.1007/978-94-017-7267-9_9},
year = {2017},
date = {2017-01-01},
booktitle = {Handbook of Hardware/Software Codesign},
pages = {247--270},
publisher = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {incollection}
}
|
Shoushtari, Majid; Rahmani, Amir M; Dutt, Nikil D Quality-configurable memory hierarchy through approximation: special
session Proceedings Article In: Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, CASES 2017, Seoul, Republic
of Korea, October 15-20, 2017, pp. 2:1–2:2, ACM, 2017. @inproceedings{DBLP:conf/cases/ShoushtariRD17b,
title = {Quality-configurable memory hierarchy through approximation: special
session},
author = {Majid Shoushtari and Amir M Rahmani and Nikil D Dutt},
url = {https://doi.org/10.1145/3125501.3125525},
doi = {10.1145/3125501.3125525},
year = {2017},
date = {2017-01-01},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, CASES 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {2:1--2:2},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Kanduri, Anil; Haghbayan, Mohammad Hashem; Rahmani, Amir M; Liljeberg, Pasi; Jantsch, Axel; Tenhunen, Hannu; Dutt, Nikil D Accuracy-Aware Power Management for Many-Core Systems Running Error-Resilient
Applications Journal Article In: IEEE Trans. Very Large Scale Integr. Syst., vol. 25, no. 10, pp. 2749–2762, 2017. @article{DBLP:journals/tvlsi/KanduriHRLJTD17b,
title = {Accuracy-Aware Power Management for Many-Core Systems Running Error-Resilient
Applications},
author = {Anil Kanduri and Mohammad Hashem Haghbayan and Amir M Rahmani and Pasi Liljeberg and Axel Jantsch and Hannu Tenhunen and Nikil D Dutt},
url = {https://doi.org/10.1109/TVLSI.2017.2694388},
doi = {10.1109/TVLSI.2017.2694388},
year = {2017},
date = {2017-01-01},
journal = {IEEE Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {10},
pages = {2749--2762},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Shoushtari, Majid; Dutt, Nikil D SAM: Software-Assisted Memory Hierarchy for Scalable Manycore Embedded
Systems Journal Article In: IEEE Embed. Syst. Lett., vol. 9, no. 4, pp. 109–112, 2017. @article{DBLP:journals/esl/ShoushtariD17b,
title = {SAM: Software-Assisted Memory Hierarchy for Scalable Manycore Embedded
Systems},
author = {Majid Shoushtari and Nikil D Dutt},
url = {https://doi.org/10.1109/LES.2017.2748098},
doi = {10.1109/LES.2017.2748098},
year = {2017},
date = {2017-01-01},
journal = {IEEE Embed. Syst. Lett.},
volume = {9},
number = {4},
pages = {109--112},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Jantsch, Axel; Dutt, Nikil D; Rahmani, Amir M Self-Awareness in Systems on Chip - A Survey Journal Article In: IEEE Des. Test, vol. 34, no. 6, pp. 8–26, 2017. @article{DBLP:journals/dt/JantschDR17b,
title = {Self-Awareness in Systems on Chip - A Survey},
author = {Axel Jantsch and Nikil D Dutt and Amir M Rahmani},
url = {https://doi.org/10.1109/MDAT.2017.2757143},
doi = {10.1109/MDAT.2017.2757143},
year = {2017},
date = {2017-01-01},
journal = {IEEE Des. Test},
volume = {34},
number = {6},
pages = {8--26},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Nejatollahi, Hamid; Dutt, Nikil; Ray, Sandip; Regazzoni, Francesco; Banerjee, Indranil; Cammarota, Rosario Software and Hardware Implementation of Lattice-Cased Cryptography Schemes Technical Report University of California Irvine, no. CECS TR 17-04, 2017. @techreport{2017-Hamid-TR_Survey,
title = {Software and Hardware Implementation of Lattice-Cased Cryptography Schemes},
author = {Hamid Nejatollahi and Nikil Dutt and Sandip Ray and Francesco Regazzoni and Indranil Banerjee and Rosario Cammarota},
url = {https://www.researchgate.net/publication/320963262_Software_and_Hardware_Implementation_of_Lattice-Cased_Cryptography_Schemes
http://www.cecs.uci.edu/files/2018/06/2017-tr-1.pdf
},
year = {2017},
date = {2017-01-01},
journal = {University of California Irvine, CECS TR 17-04},
number = {CECS TR 17-04},
institution = {University of California Irvine,},
abstract = {Advances in computing steadily erode computer security at its foundation, and call for fundamental innovations to strengthen current practices in computer security, specifically in applied cryptography, from theory to standardization to actual implementations. At the same time, the emergence of new computing paradigms, such as cloud computing, software defined networks and Internet of Everything, demands devices to adopt an increasing number of security standards - with a diverse set of cryptographic primitives. This in turn calls for innovations in security beyond the foundational aspects, down to the actual design and deployment of such primitives and protocols while satisfying conflicting design constraints such as latency, compactness, and energy efficiency. The advent of Quantum computing threatens to break many classical cryptographic schemes, leading to innovations in public key cryptography that focus on post-quantum cryptography primitives and their protocols that are resistant to quantum computing threats. In particular, lattice-based cryptography is a promising post-quantum cryptography family, both in terms of foundational properties, as well as its application to both traditional and emerging security problems such as encryption (asymmetric, but also symmetric), digital signature, key exchange, homomorphic encryption etc. While such techniques provide guarantees in theory, their realization on contemporary computing platforms requires careful design choices and tradeoffs to manage both the diversity of computing platforms (e.g., high-performance to resource constrained), as well as agility for deployment in the face of emerging and changing standards. In this work we survey trends in lattice-based cryptographic schemes, some fundamental recent proposals for the use of lattices in computer security, challenges for their implementation in software and hardware, and emerging needs for their adoption.},
keywords = {},
pubstate = {published},
tppubtype = {techreport}
}
Advances in computing steadily erode computer security at its foundation, and call for fundamental innovations to strengthen current practices in computer security, specifically in applied cryptography, from theory to standardization to actual implementations. At the same time, the emergence of new computing paradigms, such as cloud computing, software defined networks and Internet of Everything, demands devices to adopt an increasing number of security standards - with a diverse set of cryptographic primitives. This in turn calls for innovations in security beyond the foundational aspects, down to the actual design and deployment of such primitives and protocols while satisfying conflicting design constraints such as latency, compactness, and energy efficiency. The advent of Quantum computing threatens to break many classical cryptographic schemes, leading to innovations in public key cryptography that focus on post-quantum cryptography primitives and their protocols that are resistant to quantum computing threats. In particular, lattice-based cryptography is a promising post-quantum cryptography family, both in terms of foundational properties, as well as its application to both traditional and emerging security problems such as encryption (asymmetric, but also symmetric), digital signature, key exchange, homomorphic encryption etc. While such techniques provide guarantees in theory, their realization on contemporary computing platforms requires careful design choices and tradeoffs to manage both the diversity of computing platforms (e.g., high-performance to resource constrained), as well as agility for deployment in the face of emerging and changing standards. In this work we survey trends in lattice-based cryptographic schemes, some fundamental recent proposals for the use of lattices in computer security, challenges for their implementation in software and hardware, and emerging needs for their adoption. |
Jantsch, Axel; Dutt, Nikil D Guest Editorial: Special Issue on Self-Aware Systems on Chip Journal Article In: IEEE Design & Test, vol. 34, no. 6, pp. 6–7, 2017. @article{DBLP:journals/dt/JantschD17,
title = {Guest Editorial: Special Issue on Self-Aware Systems on Chip},
author = {Axel Jantsch and Nikil D Dutt},
url = {https://doi.org/10.1109/MDAT.2017.2757445},
doi = {10.1109/MDAT.2017.2757445},
year = {2017},
date = {2017-01-01},
journal = {IEEE Design & Test},
volume = {34},
number = {6},
pages = {6--7},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Mück, Tiago Rogério; Ghaderi, Zana; Dutt, Nikil D; Bozorgzadeh, Eli Exploiting Heterogeneity for Aging-Aware Load Balancing in Mobile
Platforms Journal Article In: IEEE Trans. Multi-Scale Computing Systems, vol. 3, no. 1, pp. 25–35, 2017. @article{DBLP:journals/tmscs/MuckGDB17,
title = {Exploiting Heterogeneity for Aging-Aware Load Balancing in Mobile
Platforms},
author = {Tiago Rogério Mück and Zana Ghaderi and Nikil D Dutt and Eli Bozorgzadeh},
url = {https://doi.org/10.1109/TMSCS.2016.2627541},
doi = {10.1109/TMSCS.2016.2627541},
year = {2017},
date = {2017-01-01},
journal = {IEEE Trans. Multi-Scale Computing Systems},
volume = {3},
number = {1},
pages = {25--35},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Donyanavard, Bryan; Monazzah, Amir Mahdi Hosseini; Mück, Tiago; Dutt, Nikil D Exploring fast and slow memories in HMP core types: work-in-progress Proceedings Article In: Proceedings of the Twelfth IEEE/ACM/IFIP International Conference
on Hardware/Software Codesign and System Synthesis Companion, CODES+ISSS
2017, Seoul, Republic of Korea, October 15-20, 2017, pp. 4:1–4:2, 2017. @inproceedings{DBLP:conf/codes/DonyanavardMMD17,
title = {Exploring fast and slow memories in HMP core types: work-in-progress},
author = {Bryan Donyanavard and Amir Mahdi Hosseini Monazzah and Tiago Mück and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/3125502.3125545},
doi = {10.1145/3125502.3125545},
year = {2017},
date = {2017-01-01},
booktitle = {Proceedings of the Twelfth IEEE/ACM/IFIP International Conference
on Hardware/Software Codesign and System Synthesis Companion, CODES+ISSS
2017, Seoul, Republic of Korea, October 15-20, 2017},
pages = {4:1--4:2},
crossref = {DBLP:conf/codes/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Anzanpour, Arman; Azimi, Iman; Gotzinger, Maximilian; Rahmani, Amir M; Taherinejad, Nima; Liljeberg, Pasi; Jantsch, Axel; Dutt, Nikil D Self-awareness in remote health monitoring systems using wearable electronics Proceedings Article In: Design, Automation & Test in Europe Conference & Exhibition,
DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pp. 1056–1061, 2017. @inproceedings{DBLP:conf/date/AnzanpourAGRTLJ17,
title = {Self-awareness in remote health monitoring systems using wearable electronics},
author = {Arman Anzanpour and Iman Azimi and Maximilian Gotzinger and Amir M Rahmani and Nima Taherinejad and Pasi Liljeberg and Axel Jantsch and Nikil D Dutt},
url = {https://doi.org/10.23919/DATE.2017.7927146},
doi = {10.23919/DATE.2017.7927146},
year = {2017},
date = {2017-01-01},
booktitle = {Design, Automation & Test in Europe Conference & Exhibition,
DATE 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1056--1061},
crossref = {DBLP:conf/date/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Park, Jurn-Gyu; Dutt, Nikil D; Lim, Sung-Soo ML-Gov: a machine learning enhanced integrated CPU-GPU DVFS governor
for mobile gaming Proceedings Article In: Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for
Real-Time Multimedia, ESTImedia 2017, Seoul, Republic of Korea, October
15 - 20, 2017, pp. 12–21, 2017. @inproceedings{DBLP:conf/estimedia/ParkDL17,
title = {ML-Gov: a machine learning enhanced integrated CPU-GPU DVFS governor
for mobile gaming},
author = {Jurn-Gyu Park and Nikil D Dutt and Sung-Soo Lim},
url = {http://doi.acm.org/10.1145/3139315.3139317},
doi = {10.1145/3139315.3139317},
year = {2017},
date = {2017-01-01},
booktitle = {Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for
Real-Time Multimedia, ESTImedia 2017, Seoul, Republic of Korea, October
15 - 20, 2017},
pages = {12--21},
crossref = {DBLP:conf/estimedia/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Monazzah, Amir Mahdi Hosseini; Shoushtari, Majid; Miremadi, Seyed Ghassem; Rahmani, Amir M; Dutt, Nikil D QuARK: Quality-configurable approximate STT-MRAM cache by fine-grained
tuning of reliability-energy knobs Proceedings Article In: 2017 IEEE/ACM International Symposium on Low Power Electronics and
Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017, pp. 1–6, 2017. @inproceedings{DBLP:conf/islped/MonazzahSMRD17,
title = {QuARK: Quality-configurable approximate STT-MRAM cache by fine-grained
tuning of reliability-energy knobs},
author = {Amir Mahdi Hosseini Monazzah and Majid Shoushtari and Seyed Ghassem Miremadi and Amir M Rahmani and Nikil D Dutt},
url = {https://doi.org/10.1109/ISLPED.2017.8009198},
doi = {10.1109/ISLPED.2017.8009198},
year = {2017},
date = {2017-01-01},
booktitle = {2017 IEEE/ACM International Symposium on Low Power Electronics and
Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017},
pages = {1--6},
crossref = {DBLP:conf/islped/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Aliee, Hananeh; BanaiyanMofrad, Abbas; ß, Michael Gla; ü, J; Dutt, Nikil D Redundancy-aware Design Space Exploration for Memory Reliability in
Many-cores Proceedings Article In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen, MBMV 2017, Bremen, Germany, February
8-9, 2017., pp. 1–12, 2017. @inproceedings{DBLP:conf/mbmv/AlieeBGTD17,
title = {Redundancy-aware Design Space Exploration for Memory Reliability in
Many-cores},
author = {Hananeh Aliee and Abbas BanaiyanMofrad and Michael Gla ß and J ü and Nikil D Dutt},
year = {2017},
date = {2017-01-01},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen, MBMV 2017, Bremen, Germany, February
8-9, 2017.},
pages = {1--12},
crossref = {DBLP:conf/mbmv/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Rahmani, Amir M; Jantsch, Axel Empowering autonomy through self-awareness in MPSoCs Proceedings Article In: 15th IEEE International New Circuits and Systems Conference, NEWCAS
2017, Strasbourg, France, June 25-28, 2017, pp. 73–76, 2017. @inproceedings{DBLP:conf/newcas/DuttRJ17,
title = {Empowering autonomy through self-awareness in MPSoCs},
author = {Nikil D Dutt and Amir M Rahmani and Axel Jantsch},
url = {https://doi.org/10.1109/NEWCAS.2017.8010108},
doi = {10.1109/NEWCAS.2017.8010108},
year = {2017},
date = {2017-01-01},
booktitle = {15th IEEE International New Circuits and Systems Conference, NEWCAS
2017, Strasbourg, France, June 25-28, 2017},
pages = {73--76},
crossref = {DBLP:conf/newcas/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Shahosseini, Sina; Moazzemi, Kasra; Rahmani, Amir M; Dutt, Nikil D Dependability evaluation of SISO control-theoretic power managers for processor architectures Proceedings Article In: IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP
and International Symposium of System-on-Chip (SoC), Linköping,
Sweden, October 23-25, 2017, pp. 1–6, 2017. @inproceedings{DBLP:conf/norchip/ShahosseiniMRD17,
title = {Dependability evaluation of SISO control-theoretic power managers for processor architectures},
author = {Sina Shahosseini and Kasra Moazzemi and Amir M Rahmani and Nikil D Dutt},
url = {http://duttgroup.ics.uci.edu/wp-content/uploads/2018/05/NORCAS_drg.pdf
https://doi.org/10.1109/NORCHIP.2017.8124983},
doi = {10.1109/NORCHIP.2017.8124983},
year = {2017},
date = {2017-01-01},
booktitle = {IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP
and International Symposium of System-on-Chip (SoC), Linköping,
Sweden, October 23-25, 2017},
pages = {1--6},
crossref = {DBLP:conf/norchip/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mück, Tiago; Donyanavard, Bryan; Dutt, Nikil D PoIiCym: rapid prototyping of resource management policies for HMPs Proceedings Article In: International Symposium on Rapid System Prototyping, RSP 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea., pp. 23–29, 2017. @inproceedings{DBLP:conf/rsp/MuckDD17,
title = {PoIiCym: rapid prototyping of resource management policies for HMPs},
author = {Tiago Mück and Bryan Donyanavard and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/3130265.3130321},
doi = {10.1145/3130265.3130321},
year = {2017},
date = {2017-01-01},
booktitle = {International Symposium on Rapid System Prototyping, RSP 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea.},
pages = {23--29},
crossref = {DBLP:conf/rsp/2017},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Das, Anup; Pradhapan, Paruthi; Groenendaal, Willemijn; Adiraju, Prathyusha; Rajan, Raj Thilak; Catthoor, Francky; Schaafsma, Siebren; Krichmar, Jeffrey L; Dutt, Nikil D; Hoof, Chris Van Unsupervised Heart-rate Estimation in Wearables With Liquid States
and A Probabilistic Readout Journal Article In: CoRR, vol. abs/1708.05356, 2017. @article{DBLP:journals/corr/abs-1708-05356,
title = {Unsupervised Heart-rate Estimation in Wearables With Liquid States
and A Probabilistic Readout},
author = {Anup Das and Paruthi Pradhapan and Willemijn Groenendaal and Prathyusha Adiraju and Raj Thilak Rajan and Francky Catthoor and Siebren Schaafsma and Jeffrey L Krichmar and Nikil D Dutt and Chris Van Hoof},
url = {http://arxiv.org/abs/1708.05356},
year = {2017},
date = {2017-01-01},
journal = {CoRR},
volume = {abs/1708.05356},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Detorakis, Georgios; Sheik, Sadique; Augustine, Charles; Paul, Somnath; Pedroni, Bruno U; Dutt, Nikil D; Krichmar, Jeffrey L; Cauwenberghs, Gert; Neftci, Emre Neural and Synaptic Array Transceiver: A Brain-Inspired Computing
Framework for Embedded Learning Journal Article In: CoRR, vol. abs/1709.10205, 2017. @article{DBLP:journals/corr/abs-1709-10205,
title = {Neural and Synaptic Array Transceiver: A Brain-Inspired Computing
Framework for Embedded Learning},
author = {Georgios Detorakis and Sadique Sheik and Charles Augustine and Somnath Paul and Bruno U Pedroni and Nikil D Dutt and Jeffrey L Krichmar and Gert Cauwenberghs and Emre Neftci},
url = {http://arxiv.org/abs/1709.10205},
year = {2017},
date = {2017-01-01},
journal = {CoRR},
volume = {abs/1709.10205},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
2016
|
Jeong, Gu Min; Park, Chang Woo; Choi, Sang Il; Lee, Kyoungwoo; Dutt, Nikil D Robust Face Recognition Against Soft-errors Using a Cross-layer Approach Journal Article In: Int. J. Comput. Commun. Control, vol. 11, no. 5, pp. 657–665, 2016. @article{DBLP:journals/ijccc/JeongPCLD16,
title = {Robust Face Recognition Against Soft-errors Using a Cross-layer Approach},
author = {Gu Min Jeong and Chang Woo Park and Sang Il Choi and Kyoungwoo Lee and Nikil D Dutt},
url = {https://doi.org/10.15837/ijccc.2016.5.2020},
doi = {10.15837/ijccc.2016.5.2020},
year = {2016},
date = {2016-01-01},
journal = {Int. J. Comput. Commun. Control},
volume = {11},
number = {5},
pages = {657--665},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Shrivastava, Aviral; Dutt, Nikil D; Cai, Jian; Shoushtari, Majid; Donyanavard, Bryan; Tajik, Hossein Automatic management of Software Programmable Memories in Many-core
Architectures Journal Article In: IET Computers & Digital Techniques, vol. 10, no. 6, pp. 288–298, 2016. @article{DBLP:journals/iet-cdt/ShrivastavaDCSD16,
title = {Automatic management of Software Programmable Memories in Many-core
Architectures},
author = {Aviral Shrivastava and Nikil D Dutt and Jian Cai and Majid Shoushtari and Bryan Donyanavard and Hossein Tajik},
url = {https://doi.org/10.1049/iet-cdt.2016.0024},
doi = {10.1049/iet-cdt.2016.0024},
year = {2016},
date = {2016-01-01},
journal = {IET Computers & Digital Techniques},
volume = {10},
number = {6},
pages = {288--298},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Dutt, Nikil D; Jantsch, Axel; Sarma, Santanu Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC)
Perspective Journal Article In: ACM Trans. Embedded Comput. Syst., vol. 15, no. 2, pp. 22:1–22:27, 2016. @article{DBLP:journals/tecs/DuttJS16,
title = {Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC)
Perspective},
author = {Nikil D Dutt and Axel Jantsch and Santanu Sarma},
url = {http://doi.acm.org/10.1145/2872936},
doi = {10.1145/2872936},
year = {2016},
date = {2016-01-01},
journal = {ACM Trans. Embedded Comput. Syst.},
volume = {15},
number = {2},
pages = {22:1--22:27},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Tajik, Hossein; Donyanavard, Bryan; Dutt, Nikil D; Jahn, Janmartin; ö, J SPMPool: Runtime SPM Management for Memory-Intensive Applications
in Embedded Many-Cores Journal Article In: ACM Trans. Embedded Comput. Syst., vol. 16, no. 1, pp. 25:1–25:27, 2016. @article{DBLP:journals/tecs/TajikDDJH16,
title = {SPMPool: Runtime SPM Management for Memory-Intensive Applications
in Embedded Many-Cores},
author = {Hossein Tajik and Bryan Donyanavard and Nikil D Dutt and Janmartin Jahn and J ö},
url = {http://dl.acm.org/citation.cfm?id=2968447},
year = {2016},
date = {2016-01-01},
journal = {ACM Trans. Embedded Comput. Syst.},
volume = {16},
number = {1},
pages = {25:1--25:27},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Sarma, Santanu; Mück, Tiago; Shoushtari, Majid; BanaiyanMofrad, Abbas; Dutt, Nikil D Cross-layer virtual/physical sensing and actuation for resilient heterogeneous
many-core SoCs Proceedings Article In: 21st Asia and South Pacific Design Automation Conference, ASP-DAC
2016, Macao, Macao, January 25-28, 2016, pp. 395–402, 2016. @inproceedings{DBLP:conf/aspdac/SarmaMSBD16,
title = {Cross-layer virtual/physical sensing and actuation for resilient heterogeneous
many-core SoCs},
author = {Santanu Sarma and Tiago Mück and Majid Shoushtari and Abbas BanaiyanMofrad and Nikil D Dutt},
url = {https://doi.org/10.1109/ASPDAC.2016.7428044},
doi = {10.1109/ASPDAC.2016.7428044},
year = {2016},
date = {2016-01-01},
booktitle = {21st Asia and South Pacific Design Automation Conference, ASP-DAC
2016, Macao, Macao, January 25-28, 2016},
pages = {395--402},
crossref = {DBLP:conf/aspdac/2016},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Donyanavard, Bryan; Mück, Tiago; Sarma, Santanu; Dutt, Nikil D SPARTA: runtime task allocation for energy efficient heterogeneous many-cores Proceedings Article In: Proceedings of the Eleventh IEEE/ACM/IFIP International Conference
on Hardware/Software Codesign and System Synthesis, CODES 2016,
Pittsburgh, Pennsylvania, USA, October 1-7, 2016, pp. 27:1–27:10, 2016. @inproceedings{DBLP:conf/codes/DonyanavardMSD16,
title = {SPARTA: runtime task allocation for energy efficient heterogeneous many-cores},
author = {Bryan Donyanavard and Tiago Mück and Santanu Sarma and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/2968456.2968459},
doi = {10.1145/2968456.2968459},
year = {2016},
date = {2016-01-01},
booktitle = {Proceedings of the Eleventh IEEE/ACM/IFIP International Conference
on Hardware/Software Codesign and System Synthesis, CODES 2016,
Pittsburgh, Pennsylvania, USA, October 1-7, 2016},
pages = {27:1--27:10},
crossref = {DBLP:conf/codes/2016},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Kurdahi, Fadi J; Ernst, Rolf; Herkersdorf, Andreas Conquering MPSoC complexity with principles of a self-aware information
processing factory Proceedings Article In: Proceedings of the Eleventh IEEE/ACM/IFIP International Conference
on Hardware/Software Codesign and System Synthesis, CODES 2016,
Pittsburgh, Pennsylvania, USA, October 1-7, 2016, pp. 37:1–37:4, 2016. @inproceedings{DBLP:conf/codes/DuttKEH16,
title = {Conquering MPSoC complexity with principles of a self-aware information
processing factory},
author = {Nikil D Dutt and Fadi J Kurdahi and Rolf Ernst and Andreas Herkersdorf},
url = {http://doi.acm.org/10.1145/2968456.2973275},
doi = {10.1145/2968456.2973275},
year = {2016},
date = {2016-01-01},
booktitle = {Proceedings of the Eleventh IEEE/ACM/IFIP International Conference
on Hardware/Software Codesign and System Synthesis, CODES 2016,
Pittsburgh, Pennsylvania, USA, October 1-7, 2016},
pages = {37:1--37:4},
crossref = {DBLP:conf/codes/2016},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Tajik, Hossein; Donyanavard, Bryan; Dutt, Nikil D On Detecting and Using Memory Phases in Multimedia Systems Proceedings Article In: Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for
Real-Time Multimedia, ESTIMedia 2016, Pittsburgh, PA, USA, October
6-7, 2016, pp. 57–66, 2016. @inproceedings{DBLP:conf/estimedia/TajikDD16,
title = {On Detecting and Using Memory Phases in Multimedia Systems},
author = {Hossein Tajik and Bryan Donyanavard and Nikil D Dutt},
url = {http://dl.acm.org/citation.cfm?id=2993566},
year = {2016},
date = {2016-01-01},
booktitle = {Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for
Real-Time Multimedia, ESTIMedia 2016, Pittsburgh, PA, USA, October
6-7, 2016},
pages = {57--66},
crossref = {DBLP:conf/estimedia/2016},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
