2002
|
Lee, Jong-eun; Choi, Kiyoung; Dutt, Nikil D Efficient instruction encoding for automatic instruction set design
of configurable ASIPs Inproceedings Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided
Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 649–654, 2002. Links | BibTeX @inproceedings{DBLP:conf/iccad/LeeCD02,
title = {Efficient instruction encoding for automatic instruction set design
of configurable ASIPs},
author = {Jong-eun Lee and Kiyoung Choi and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/774572.774668},
doi = {10.1145/774572.774668},
year = {2002},
date = {2002-01-01},
booktitle = {Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided
Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002},
pages = {649--654},
crossref = {DBLP:conf/iccad/2002},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mishra, Prabhat; Dutt, Nikil D Modeling and Verification of Pipelined Embedded Processors in the
Presence of Hazards and Exceptions Inproceedings Design and Analysis of Distributed Embedded Systems, IFIP 17(^mboxth)
World Computer Congress - TC10 Stream on Distributed and Parallel
Embedded Systems (DIPES 2002), August 25-29, 2002, Montréal,
Québec, Canada, pp. 81–90, 2002. BibTeX @inproceedings{DBLP:conf/ifip10-3/MishraD02,
title = {Modeling and Verification of Pipelined Embedded Processors in the
Presence of Hazards and Exceptions},
author = {Prabhat Mishra and Nikil D Dutt},
year = {2002},
date = {2002-01-01},
booktitle = {Design and Analysis of Distributed Embedded Systems, IFIP 17(^mboxth)
World Computer Congress - TC10 Stream on Distributed and Parallel
Embedded Systems (DIPES 2002), August 25-29, 2002, Montréal,
Québec, Canada},
pages = {81--90},
crossref = {DBLP:conf/ifip10-3/2002dipes},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nicolau, Alexandru; Dutt, Nikil D; Shrivastava, Aviral; Biswas, Partha; Halambi, Ashok A Design Space Exploration Framework for Reduced Bit-Width Instruction
Set Architecture (rISA) Design Inproceedings Proceedings of the 15th International Symposium on System Synthesis
(ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 120–125, 2002. Links | BibTeX @inproceedings{DBLP:conf/isss/NicolauDSBH02,
title = {A Design Space Exploration Framework for Reduced Bit-Width Instruction
Set Architecture (rISA) Design},
author = {Alexandru Nicolau and Nikil D Dutt and Aviral Shrivastava and Partha Biswas and Ashok Halambi},
url = {http://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227163},
doi = {10.1109/ISSS.2002.1227163},
year = {2002},
date = {2002-01-01},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
(ISSS 2002), October 2-4, 2002, Kyoto, Japan},
pages = {120--125},
crossref = {DBLP:conf/isss/2002},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Hirschberg, Daniel S; Mamidipaka, Mahesh Efficient Power Reduction Techniques for Time Multiplexed Address
Buses Inproceedings Proceedings of the 15th International Symposium on System Synthesis
(ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 207–212, 2002. Links | BibTeX @inproceedings{DBLP:conf/isss/DuttHM02,
title = {Efficient Power Reduction Techniques for Time Multiplexed Address
Buses},
author = {Nikil D Dutt and Daniel S Hirschberg and Mahesh Mamidipaka},
url = {http://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227179},
doi = {10.1109/ISSS.2002.1227179},
year = {2002},
date = {2002-01-01},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
(ISSS 2002), October 2-4, 2002, Kyoto, Japan},
pages = {207--212},
crossref = {DBLP:conf/isss/2002},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nicolau, Alexandru; Dutt, Nikil D; Gupta, Rajesh; Savoiu, Nick; Reshadi, Mehrdad; Gupta, Sumit Dynamic Common Sub-Expression Elimination during Scheduling in High-Level
Synthesis Inproceedings Proceedings of the 15th International Symposium on System Synthesis
(ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 261–266, 2002. Links | BibTeX @inproceedings{DBLP:conf/isss/NicolauDGSRG02,
title = {Dynamic Common Sub-Expression Elimination during Scheduling in High-Level
Synthesis},
author = {Alexandru Nicolau and Nikil D Dutt and Rajesh Gupta and Nick Savoiu and Mehrdad Reshadi and Sumit Gupta},
url = {http://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227188},
doi = {10.1109/ISSS.2002.1227188},
year = {2002},
date = {2002-01-01},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
(ISSS 2002), October 2-4, 2002, Kyoto, Japan},
pages = {261--266},
crossref = {DBLP:conf/isss/2002},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mishra, Prabhat; Tomiyama, Hiroyuki; Halambi, Ashok; Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Automatic Modeling and Validation of Pipeline Specifications Driven
by an Architecture Description Language Inproceedings Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11
January 2002, Bangalore, India, pp. 458, 2002. Links | BibTeX @inproceedings{DBLP:conf/vlsid/MishraTHGDN02,
title = {Automatic Modeling and Validation of Pipeline Specifications Driven
by an Architecture Description Language},
author = {Prabhat Mishra and Hiroyuki Tomiyama and Ashok Halambi and Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ASPDAC.2002.994963},
doi = {10.1109/ASPDAC.2002.994963},
year = {2002},
date = {2002-01-01},
booktitle = {Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11
January 2002, Bangalore, India},
pages = {458},
crossref = {DBLP:conf/vlsid/2002},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
2001
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru; Catthoor, Francky; Vandecappelle, Arnout; Brockmeyer, Erik; Kulkarni, Chidamber; de Greef, Eddy Data Memory Organization and Optimizations in Application-Specific
Systems Journal Article IEEE Design & Test of Computers, 18 (3), pp. 56–68, 2001. Links | BibTeX @article{DBLP:journals/dt/PandaDNCVBKG01,
title = {Data Memory Organization and Optimizations in Application-Specific
Systems},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau and Francky Catthoor and Arnout Vandecappelle and Erik Brockmeyer and Chidamber Kulkarni and Eddy de Greef},
url = {https://doi.org/10.1109/54.922803},
doi = {10.1109/54.922803},
year = {2001},
date = {2001-01-01},
journal = {IEEE Design & Test of Computers},
volume = {18},
number = {3},
pages = {56--68},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Catthoor, Francky; Danckaert, Koen; Wuytack, Sven; Dutt, Nikil D Code Transformations for Data Transfer and Storage Exploration Preprocessing
in Multimedia Processors Journal Article IEEE Design & Test of Computers, 18 (3), pp. 70–82, 2001. Links | BibTeX @article{DBLP:journals/dt/CatthoorDWD01,
title = {Code Transformations for Data Transfer and Storage Exploration Preprocessing
in Multimedia Processors},
author = {Francky Catthoor and Koen Danckaert and Sven Wuytack and Nikil D Dutt},
url = {https://doi.org/10.1109/54.922804},
doi = {10.1109/54.922804},
year = {2001},
date = {2001-01-01},
journal = {IEEE Design & Test of Computers},
volume = {18},
number = {3},
pages = {70--82},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Khare, Asheesh; Halambi, Ashok; Savoiu, Nicolae; Grun, Peter; Dutt, Nikil D; Nicolau, Alex V-SAT: A visual specification and analysis tool for system-on-chip
exploration Journal Article Journal of Systems Architecture, 47 (3-4), pp. 263–275, 2001. Links | BibTeX @article{DBLP:journals/jsa/KhareHSGDN01,
title = {V-SAT: A visual specification and analysis tool for system-on-chip
exploration},
author = {Asheesh Khare and Ashok Halambi and Nicolae Savoiu and Peter Grun and Nikil D Dutt and Alex Nicolau},
url = {https://doi.org/10.1016/S1383-7621(00)00049-7},
doi = {10.1016/S1383-7621(00)00049-7},
year = {2001},
date = {2001-01-01},
journal = {Journal of Systems Architecture},
volume = {47},
number = {3-4},
pages = {263--275},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Catthoor, Francky; Dutt, Nikil D; Danckaert, Koen; Brockmeyer, Erik; Kulkarni, Chidamber; Vandecappelle, Arnout; Kjeldsberg, Per Gunnar Data and memory optimization techniques for embedded systems Journal Article ACM Trans. Design Autom. Electr. Syst., 6 (2), pp. 149–206, 2001. Links | BibTeX @article{DBLP:journals/todaes/PandaCDDBKVK01,
title = {Data and memory optimization techniques for embedded systems},
author = {Preeti Ranjan Panda and Francky Catthoor and Nikil D Dutt and Koen Danckaert and Erik Brockmeyer and Chidamber Kulkarni and Arnout Vandecappelle and Per Gunnar Kjeldsberg},
url = {http://doi.acm.org/10.1145/375977.375978},
doi = {10.1145/375977.375978},
year = {2001},
date = {2001-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {6},
number = {2},
pages = {149--206},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Dutt, Nikil D; Nicolau, Alexandru; Tomiyama, Hiroyuki; Halambi, Ashok New directions in compiler technology for embedded systems (embedded
tutorial) Inproceedings Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 409–414, 2001. Links | BibTeX @inproceedings{DBLP:conf/aspdac/DuttNTH01,
title = {New directions in compiler technology for embedded systems (embedded
tutorial)},
author = {Nikil D Dutt and Alexandru Nicolau and Hiroyuki Tomiyama and Ashok Halambi},
url = {http://doi.acm.org/10.1145/370155.370429},
doi = {10.1145/370155.370429},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {409--414},
crossref = {DBLP:conf/aspdac/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Gupta, Sumit; Savoiu, Nick; Kim, Sunwoo; Dutt, Nikil D; Gupta, Rajesh K; Nicolau, Alexandru Speculation Techniques for High Level Synthesis of Control Intensive
Designs Inproceedings Proceedings of the 38th Design Automation Conference, DAC 2001,
Las Vegas, NV, USA, June 18-22, 2001, pp. 269–272, 2001. Links | BibTeX @inproceedings{DBLP:conf/dac/GuptaSKDGN01,
title = {Speculation Techniques for High Level Synthesis of Control Intensive
Designs},
author = {Sumit Gupta and Nick Savoiu and Sunwoo Kim and Nikil D Dutt and Rajesh K Gupta and Alexandru Nicolau},
url = {http://doi.acm.org/10.1145/378239.378481},
doi = {10.1145/378239.378481},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the 38th Design Automation Conference, DAC 2001,
Las Vegas, NV, USA, June 18-22, 2001},
pages = {269--272},
crossref = {DBLP:conf/dac/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Access pattern based local memory customization for low power embedded
systems Inproceedings Proceedings of the Conference on Design, Automation and Test in Europe,
DATE 2001, Munich, Germany, March 12-16, 2001, pp. 778–784, 2001. Links | BibTeX @inproceedings{DBLP:conf/date/GrunDN01,
title = {Access pattern based local memory customization for low power embedded
systems},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/DATE.2001.915120},
doi = {10.1109/DATE.2001.915120},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
DATE 2001, Munich, Germany, March 12-16, 2001},
pages = {778--784},
crossref = {DBLP:conf/date/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mishra, Prabhat; Dutt, Nikil D; Nicolau, Alex Automatic validation of pipeline specifications Inproceedings Proceedings of the Sixth IEEE International High-Level Design Validation
and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001, pp. 9–13, 2001. Links | BibTeX @inproceedings{DBLP:conf/hldvt/MishraDN01,
title = {Automatic validation of pipeline specifications},
author = {Prabhat Mishra and Nikil D Dutt and Alex Nicolau},
url = {https://doi.org/10.1109/HLDVT.2001.972800},
doi = {10.1109/HLDVT.2001.972800},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the Sixth IEEE International High-Level Design Validation
and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001},
pages = {9--13},
crossref = {DBLP:conf/hldvt/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mamidipaka, Mahesh; Hirschberg, Daniel S; Dutt, Nikil D Low power address encoding using self-organizing lists Inproceedings Proceedings of the 2001 International Symposium on Low Power Electronics
and Design, 2001, Huntington Beach, California, USA, 2001, pp. 188–193, 2001. Links | BibTeX @inproceedings{DBLP:conf/islped/MamidipakaHD01,
title = {Low power address encoding using self-organizing lists},
author = {Mahesh Mamidipaka and Daniel S Hirschberg and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/383082.383129},
doi = {10.1145/383082.383129},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the 2001 International Symposium on Low Power Electronics
and Design, 2001, Huntington Beach, California, USA, 2001},
pages = {188--193},
crossref = {DBLP:conf/islped/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru APEX: Access Pattern Based Memory Architecture Exploration Inproceedings Proceedings of the 14th International Symposium on Systems Synthesis,
ISSS 2001, Montrél, Québec, Canada, September 30 - October
3, 2001., pp. 25–32, 2001. Links | BibTeX @inproceedings{DBLP:conf/isss/GrunDN01,
title = {APEX: Access Pattern Based Memory Architecture Exploration},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ISSS.2001.957908},
doi = {10.1109/ISSS.2001.957908},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the 14th International Symposium on Systems Synthesis,
ISSS 2001, Montrél, Québec, Canada, September 30 - October
3, 2001.},
pages = {25--32},
crossref = {DBLP:conf/isss/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Gupta, Sumit; Savoiu, Nick; Dutt, Nikil D; Gupta, Rajesh K; Nicolau, Alexandru Conditional speculation and its effects on performance and area for
high-level snthesis Inproceedings Proceedings of the 14th International Symposium on Systems Synthesis,
ISSS 2001, Montrél, Québec, Canada, September 30 - October
3, 2001., pp. 171–176, 2001. Links | BibTeX @inproceedings{DBLP:conf/isss/GuptaSDGN01,
title = {Conditional speculation and its effects on performance and area for
high-level snthesis},
author = {Sumit Gupta and Nick Savoiu and Nikil D Dutt and Rajesh K Gupta and Alexandru Nicolau},
url = {https://doi.org/10.1109/ISSS.2001.957934},
doi = {10.1109/ISSS.2001.957934},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the 14th International Symposium on Systems Synthesis,
ISSS 2001, Montrél, Québec, Canada, September 30 - October
3, 2001.},
pages = {171--176},
crossref = {DBLP:conf/isss/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mishra, Prabhat; Dutt, Nikil D; Nicolau, Alexandru Functional abstraction driven design space exploration of heterogeneous
programmable architectures Inproceedings Proceedings of the 14th International Symposium on Systems Synthesis,
ISSS 2001, Montrél, Québec, Canada, September 30 - October
3, 2001., pp. 256–261, 2001. Links | BibTeX @inproceedings{DBLP:conf/isss/MishraDN01,
title = {Functional abstraction driven design space exploration of heterogeneous
programmable architectures},
author = {Prabhat Mishra and Nikil D Dutt and Alexandru Nicolau},
url = {http://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957951},
doi = {10.1109/ISSS.2001.957951},
year = {2001},
date = {2001-01-01},
booktitle = {Proceedings of the 14th International Symposium on Systems Synthesis,
ISSS 2001, Montrél, Québec, Canada, September 30 - October
3, 2001.},
pages = {256--261},
crossref = {DBLP:conf/isss/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Mishra, Prabhat; Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Processor-Memory Co-Exploration driven by a Memory-Aware Architecture
Description Language Inproceedings 14th International Conference on VLSI Design (VLSI Design 2001),
3-7 January 2001, Bangalore, India, pp. 70–75, 2001. Links | BibTeX @inproceedings{DBLP:conf/vlsid/MishraGDN01,
title = {Processor-Memory Co-Exploration driven by a Memory-Aware Architecture
Description Language},
author = {Prabhat Mishra and Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ICVD.2001.902642},
doi = {10.1109/ICVD.2001.902642},
year = {2001},
date = {2001-01-01},
booktitle = {14th International Conference on VLSI Design (VLSI Design 2001),
3-7 January 2001, Bangalore, India},
pages = {70--75},
crossref = {DBLP:conf/vlsid/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Datta, Anupam; Choudhury, Sidharth; Basu, Anupam; Tomiyama, Hiroyuki; Dutt, Nikil D Satisfying Timing Constraints of Preemptive Real-Time Tasks through
Task Layout Technique Inproceedings 14th International Conference on VLSI Design (VLSI Design 2001),
3-7 January 2001, Bangalore, India, pp. 97–102, 2001. Links | BibTeX @inproceedings{DBLP:conf/vlsid/DattaCBTD01,
title = {Satisfying Timing Constraints of Preemptive Real-Time Tasks through
Task Layout Technique},
author = {Anupam Datta and Sidharth Choudhury and Anupam Basu and Hiroyuki Tomiyama and Nikil D Dutt},
url = {https://doi.org/10.1109/ICVD.2001.902646},
doi = {10.1109/ICVD.2001.902646},
year = {2001},
date = {2001-01-01},
booktitle = {14th International Conference on VLSI Design (VLSI Design 2001),
3-7 January 2001, Bangalore, India},
pages = {97--102},
crossref = {DBLP:conf/vlsid/2001},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
2000
|
Jha, Pradip K; Dutt, Nikil D High-level library mapping for memories Journal Article ACM Trans. Design Autom. Electr. Syst., 5 (3), pp. 566–603, 2000. Links | BibTeX @article{DBLP:journals/todaes/JhaD00,
title = {High-level library mapping for memories},
author = {Pradip K Jha and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/348019.348297},
doi = {10.1145/348019.348297},
year = {2000},
date = {2000-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {5},
number = {3},
pages = {566--603},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru On-chip vs. off-chip memory: the data partitioning problem in embedded
processor-based systems Journal Article ACM Trans. Design Autom. Electr. Syst., 5 (3), pp. 682–704, 2000. Links | BibTeX @article{DBLP:journals/todaes/PandaDN00,
title = {On-chip vs. off-chip memory: the data partitioning problem in embedded
processor-based systems},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {http://doi.acm.org/10.1145/348019.348570},
doi = {10.1145/348019.348570},
year = {2000},
date = {2000-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {5},
number = {3},
pages = {682--704},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Wu, Allen C -H; Dutt, Nikil D Guest editorial 11th international symposium on system-level synthesis
and design (ISSS'98) Journal Article IEEE Trans. VLSI Syst., 8 (5), pp. 469–471, 2000. Links | BibTeX @article{DBLP:journals/tvlsi/WuD00,
title = {Guest editorial 11th international symposium on system-level synthesis
and design (ISSS'98)},
author = {Allen C -H Wu and Nikil D Dutt},
url = {https://doi.org/10.1109/TVLSI.2000.894151},
doi = {10.1109/TVLSI.2000.894151},
year = {2000},
date = {2000-01-01},
journal = {IEEE Trans. VLSI Syst.},
volume = {8},
number = {5},
pages = {469--471},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Tomiyama, Hiroyuki; Dutt, Nikil D Program path analysis to bound cache-related preemption delay in preemptive
real-time systems Inproceedings Proceedings of the Eighth International Workshop on Hardware/Software
Codesign, CODES 2000, San Diego, California, USA, 2000, pp. 67–71, 2000. Links | BibTeX @inproceedings{DBLP:conf/codes/TomiyamaD00,
title = {Program path analysis to bound cache-related preemption delay in preemptive
real-time systems},
author = {Hiroyuki Tomiyama and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/334012.334025},
doi = {10.1145/334012.334025},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the Eighth International Workshop on Hardware/Software
Codesign, CODES 2000, San Diego, California, USA, 2000},
pages = {67--71},
crossref = {DBLP:conf/codes/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Memory aware compilation through accurate timing extraction Inproceedings Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000., pp. 316–321, 2000. Links | BibTeX @inproceedings{DBLP:conf/dac/GrunDN00,
title = {Memory aware compilation through accurate timing extraction},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {http://doi.acm.org/10.1145/337292.337428},
doi = {10.1145/337292.337428},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000.},
pages = {316--321},
crossref = {DBLP:conf/dac/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Catthoor, Francky; Dutt, Nikil D; Kozyrakis, Christoforos E How to Solve the Current Memory Access and Data Transfer Bottlenecks:
At the Processor Architecture or at the Compiler Level? Inproceedings 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France, pp. 426–433, 2000. Links | BibTeX @inproceedings{DBLP:conf/date/CatthoorDK00,
title = {How to Solve the Current Memory Access and Data Transfer Bottlenecks:
At the Processor Architecture or at the Compiler Level?},
author = {Francky Catthoor and Nikil D Dutt and Christoforos E Kozyrakis},
url = {https://doi.org/10.1109/DATE.2000.840306},
doi = {10.1109/DATE.2000.840306},
year = {2000},
date = {2000-01-01},
booktitle = {2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France},
pages = {426--433},
crossref = {DBLP:conf/date/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Halambi, Ashok; Cornea, Radu; Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Architecture Exploration of Parameterizable EPIC SOC Architectures Inproceedings 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France, pp. 748, 2000. Links | BibTeX @inproceedings{DBLP:conf/date/HalambiCGDN00,
title = {Architecture Exploration of Parameterizable EPIC SOC Architectures},
author = {Ashok Halambi and Radu Cornea and Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/DATE.2000.840881},
doi = {10.1109/DATE.2000.840881},
year = {2000},
date = {2000-01-01},
booktitle = {2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March
2000, Paris, France},
pages = {748},
crossref = {DBLP:conf/date/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Tomiyama, Hiroyuki; Yoshino, Taisei; Dutt, Nikil D Verification of in-order execution in pipelined processors Inproceedings Proceedings of the IEEE International High-Level Design Validation
and Test Workshop 2000, Berkeley, California, USA, November 8-10,
2000, pp. 40–44, 2000. Links | BibTeX @inproceedings{DBLP:conf/hldvt/TomiyamaYD00,
title = {Verification of in-order execution in pipelined processors},
author = {Hiroyuki Tomiyama and Taisei Yoshino and Nikil D Dutt},
url = {https://doi.org/10.1109/HLDVT.2000.889557},
doi = {10.1109/HLDVT.2000.889557},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the IEEE International High-Level Design Validation
and Test Workshop 2000, Berkeley, California, USA, November 8-10,
2000},
pages = {40--44},
crossref = {DBLP:conf/hldvt/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru MIST: An Algorithm for Memory Miss Traffic Management Inproceedings Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000, pp. 431–437, 2000. Links | BibTeX @inproceedings{DBLP:conf/iccad/GrunDN00,
title = {MIST: An Algorithm for Memory Miss Traffic Management},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ICCAD.2000.896510},
doi = {10.1109/ICCAD.2000.896510},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {431--437},
crossref = {DBLP:conf/iccad/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nachtergaele, Lode; Tiwari, Vivek; Dutt, Nikil D System and Architecture-Level Power Reduction for Microprocessor-Based
Communication and Multi-Media Applications Inproceedings Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000, pp. 569–573, 2000. Links | BibTeX @inproceedings{DBLP:conf/iccad/NachtergaeleTD00,
title = {System and Architecture-Level Power Reduction for Microprocessor-Based
Communication and Multi-Media Applications},
author = {Lode Nachtergaele and Vivek Tiwari and Nikil D Dutt},
url = {https://doi.org/10.1109/ICCAD.2000.896533},
doi = {10.1109/ICCAD.2000.896533},
year = {2000},
date = {2000-01-01},
booktitle = {Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {569--573},
crossref = {DBLP:conf/iccad/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Halambi, Ashok; Dutt, Nikil D; Nicolau, Alexandru Customizing Software Toolkits for Embedded Systems-On-Chip Inproceedings Architecture and Design of Distributed Embedded Systems, IFIP WG10.3/WG10.4/WG10.5
International Workshop on Distributed and Parallel Embedded Systems
(DIPES 2000), October 18-19, 2000, Schloß Eringerfeld, Germany, pp. 87–98, 2000. BibTeX @inproceedings{DBLP:conf/ifip10-3/HalambiDN00,
title = {Customizing Software Toolkits for Embedded Systems-On-Chip},
author = {Ashok Halambi and Nikil D Dutt and Alexandru Nicolau},
year = {2000},
date = {2000-01-01},
booktitle = {Architecture and Design of Distributed Embedded Systems, IFIP WG10.3/WG10.4/WG10.5
International Workshop on Distributed and Parallel Embedded Systems
(DIPES 2000), October 18-19, 2000, Schloß Eringerfeld, Germany},
pages = {87--98},
crossref = {DBLP:conf/ifip10-3/2000dipes},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru Aggressive Memory-Aware Compilation Inproceedings Intelligent Memory Systems, Second International Workshop, IMS 2000,
Cambridge, MA, USA, November 12, 2000, Revised Papers, pp. 147–151, 2000. Links | BibTeX @inproceedings{DBLP:conf/ims/GrunDN00,
title = {Aggressive Memory-Aware Compilation},
author = {Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1007/3-540-44570-6_10},
doi = {10.1007/3-540-44570-6_10},
year = {2000},
date = {2000-01-01},
booktitle = {Intelligent Memory Systems, Second International Workshop, IMS 2000,
Cambridge, MA, USA, November 12, 2000, Revised Papers},
pages = {147--151},
crossref = {DBLP:conf/ims/2000},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1999
|
Panda, Preeti Ranjan; Nakamura, Hiroshi; Dutt, Nikil D; Nicolau, Alexandru Augmenting Loop Tiling with Data Alignment for Improved Cache Performance Journal Article IEEE Trans. Computers, 48 (2), pp. 142–149, 1999. Links | BibTeX @article{DBLP:journals/tc/PandaNDN99,
title = {Augmenting Loop Tiling with Data Alignment for Improved Cache Performance},
author = {Preeti Ranjan Panda and Hiroshi Nakamura and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/12.752655},
doi = {10.1109/12.752655},
year = {1999},
date = {1999-01-01},
journal = {IEEE Trans. Computers},
volume = {48},
number = {2},
pages = {142--149},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Local memory exploration and optimization in embedded systems Journal Article IEEE Trans. on CAD of Integrated Circuits and Systems, 18 (1), pp. 3–13, 1999. Links | BibTeX @article{DBLP:journals/tcad/PandaDN99,
title = {Local memory exploration and optimization in embedded systems},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/43.739054},
doi = {10.1109/43.739054},
year = {1999},
date = {1999-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {18},
number = {1},
pages = {3--13},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D Low-power memory mapping through reducing address bus activity Journal Article IEEE Trans. VLSI Syst., 7 (3), pp. 309–320, 1999. Links | BibTeX @article{DBLP:journals/tvlsi/PandaD99,
title = {Low-power memory mapping through reducing address bus activity},
author = {Preeti Ranjan Panda and Nikil D Dutt},
url = {https://doi.org/10.1109/92.784092},
doi = {10.1109/92.784092},
year = {1999},
date = {1999-01-01},
journal = {IEEE Trans. VLSI Syst.},
volume = {7},
number = {3},
pages = {309--320},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Halambi, Ashok; Grun, Peter; Ganesh, Vijay; Khare, Asheesh; Dutt, Nikil D; Nicolau, Alexandru EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator
Retargetability Inproceedings 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March
1999, Munich, Germany, pp. 485–490, 1999. Links | BibTeX @inproceedings{DBLP:conf/date/HalambiGGKDN99,
title = {EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator
Retargetability},
author = {Ashok Halambi and Peter Grun and Vijay Ganesh and Asheesh Khare and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/DATE.1999.761170},
doi = {10.1109/DATE.1999.761170},
year = {1999},
date = {1999-01-01},
booktitle = {1999 Design, Automation and Test in Europe (DATE '99), 9-12 March
1999, Munich, Germany},
pages = {485--490},
crossref = {DBLP:conf/date/1999},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Khare, Asheesh; Savoiu, Nicolae; Halambi, Ashok; Grun, Peter; Dutt, Nikil D; Nicolau, Alexandru V-SAT: A Visual Specification and Analysis Tool for System-On-Chip
Exploration Inproceedings 25th EUROMICRO '99 Conference, Informatics: Theory and Practice
for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1196–1203, 1999. Links | BibTeX @inproceedings{DBLP:conf/euromicro/KhareSHGDN99,
title = {V-SAT: A Visual Specification and Analysis Tool for System-On-Chip
Exploration},
author = {Asheesh Khare and Nicolae Savoiu and Ashok Halambi and Peter Grun and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/EURMIC.1999.794466},
doi = {10.1109/EURMIC.1999.794466},
year = {1999},
date = {1999-01-01},
booktitle = {25th EUROMICRO '99 Conference, Informatics: Theory and Practice
for the New Millenium, 8-10 September 1999, Milan, Italy},
pages = {1196--1203},
crossref = {DBLP:conf/euromicro/1999},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Foster, Eric M Design of a set-top box system on a chip (abstract) Inproceedings Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 608, 1999. Links | BibTeX @inproceedings{DBLP:conf/iccad/DuttF99,
title = {Design of a set-top box system on a chip (abstract)},
author = {Nikil D Dutt and Eric M Foster},
url = {http://doi.ieeecomputersociety.org/10.1109/ICCAD.1999.10000},
doi = {10.1109/ICCAD.1999.10000},
year = {1999},
date = {1999-01-01},
booktitle = {Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999},
pages = {608},
crossref = {DBLP:conf/iccad/1999},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Dutt, Nikil D; Kelley, Brian On the rapid prototyping and design of a wireless communication system
on a chip (abstract) Inproceedings Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 609, 1999. Links | BibTeX @inproceedings{DBLP:conf/iccad/DuttK99,
title = {On the rapid prototyping and design of a wireless communication system
on a chip (abstract)},
author = {Nikil D Dutt and Brian Kelley},
url = {http://doi.ieeecomputersociety.org/10.1109/ICCAD.1999.10002},
doi = {10.1109/ICCAD.1999.10002},
year = {1999},
date = {1999-01-01},
booktitle = {Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999},
pages = {609},
crossref = {DBLP:conf/iccad/1999},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Grun, Peter; Halambi, Ashok; Dutt, Nikil D; Nicolau, Alexandru RTGEN: An Algorithm for Automatic Generation of Reservation Tables
from Architectural Descriptions Inproceedings Proceedings of the 12th International Symposium on System Synthesis,
ISSS '99, Boca Raton, Florida, USA, November 1-4, 1999., pp. 44–50, 1999. Links | BibTeX @inproceedings{DBLP:conf/isss/GrunHDN99,
title = {RTGEN: An Algorithm for Automatic Generation of Reservation Tables
from Architectural Descriptions},
author = {Peter Grun and Ashok Halambi and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ISSS.1999.814259},
doi = {10.1109/ISSS.1999.814259},
year = {1999},
date = {1999-01-01},
booktitle = {Proceedings of the 12th International Symposium on System Synthesis,
ISSS '99, Boca Raton, Florida, USA, November 1-4, 1999.},
pages = {44--50},
crossref = {DBLP:conf/isss/1999},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1998
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Incorporating DRAM access modes into high-level synthesis Journal Article IEEE Trans. on CAD of Integrated Circuits and Systems, 17 (2), pp. 96–109, 1998. Links | BibTeX @article{DBLP:journals/tcad/PandaDN98,
title = {Incorporating DRAM access modes into high-level synthesis},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/43.681260},
doi = {10.1109/43.681260},
year = {1998},
date = {1998-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {17},
number = {2},
pages = {96--109},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Grun, Peter; Balasa, Florin; Dutt, Nikil D Memory size estimation for multimedia applications Inproceedings Proceedings of the Sixth International Workshop on Hardware/Software
Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998, pp. 145–149, 1998. Links | BibTeX @inproceedings{DBLP:conf/codes/GrunBD98,
title = {Memory size estimation for multimedia applications},
author = {Peter Grun and Florin Balasa and Nikil D Dutt},
url = {http://doi.acm.org/10.1145/278241.278325},
doi = {10.1145/278241.278325},
year = {1998},
date = {1998-01-01},
booktitle = {Proceedings of the Sixth International Workshop on Hardware/Software
Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998},
pages = {145--149},
crossref = {DBLP:conf/codes/1998},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Data Cache Sizing for Embedded Processor Applications Inproceedings 1998 Design, Automation and Test in Europe (DATE '98), February
23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 925–926, 1998. Links | BibTeX @inproceedings{DBLP:conf/date/PandaDN98,
title = {Data Cache Sizing for Embedded Processor Applications},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/DATE.1998.655972},
doi = {10.1109/DATE.1998.655972},
year = {1998},
date = {1998-01-01},
booktitle = {1998 Design, Automation and Test in Europe (DATE '98), February
23-26, 1998, Le Palais des Congrès de Paris, Paris, France},
pages = {925--926},
crossref = {DBLP:conf/date/1998},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Hein, Soren; Nagasamy, Vijay; Rohfleisch, Bernhard; Kozyrakis, Christoforos E; Dutt, Nikil D; Catthoor, Francky Embedded memories in system design - from technology to systems architecture Inproceedings Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998, pp. 1, 1998. Links | BibTeX @inproceedings{DBLP:conf/iccad/HeinNRKDC98,
title = {Embedded memories in system design - from technology to systems architecture},
author = {Soren Hein and Vijay Nagasamy and Bernhard Rohfleisch and Christoforos E Kozyrakis and Nikil D Dutt and Francky Catthoor},
url = {http://doi.acm.org/10.1145/288548.288549},
doi = {10.1145/288548.288549},
year = {1998},
date = {1998-01-01},
booktitle = {Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {1},
crossref = {DBLP:conf/iccad/1998},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Kolson, David J; Nicolau, Alexandru; Dutt, Nikil D Copy Elimination for Parallelizing Compilers Inproceedings Languages and Compilers for Parallel Computing, 11th International
Workshop, LCPC'98, Chapel Hill, NC, USA, August 7-9, 1998, Proceedings, pp. 275–289, 1998. Links | BibTeX @inproceedings{DBLP:conf/lcpc/KolsonND98,
title = {Copy Elimination for Parallelizing Compilers},
author = {David J Kolson and Alexandru Nicolau and Nikil D Dutt},
url = {https://doi.org/10.1007/3-540-48319-5_18},
doi = {10.1007/3-540-48319-5_18},
year = {1998},
date = {1998-01-01},
booktitle = {Languages and Compilers for Parallel Computing, 11th International
Workshop, LCPC'98, Chapel Hill, NC, USA, August 7-9, 1998, Proceedings},
pages = {275--289},
crossref = {DBLP:conf/lcpc/1998},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
1997
|
Ohm, Seong Yong; Kurdahi, Fadi J; Dutt, Nikil D A unified lower bound estimation technique for high-level synthesis Journal Article IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (5), pp. 458–472, 1997. Links | BibTeX @article{DBLP:journals/tcad/OhmKD97,
title = {A unified lower bound estimation technique for high-level synthesis},
author = {Seong Yong Ohm and Fadi J Kurdahi and Nikil D Dutt},
url = {https://doi.org/10.1109/43.631209},
doi = {10.1109/43.631209},
year = {1997},
date = {1997-01-01},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {16},
number = {5},
pages = {458--472},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Memory data organization for improved cache performance in embedded
processor applications Journal Article ACM Trans. Design Autom. Electr. Syst., 2 (4), pp. 384–409, 1997. Links | BibTeX @article{DBLP:journals/todaes/PandaDN97,
title = {Memory data organization for improved cache performance in embedded
processor applications},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {http://doi.acm.org/10.1145/268424.268464},
doi = {10.1145/268424.268464},
year = {1997},
date = {1997-01-01},
journal = {ACM Trans. Design Autom. Electr. Syst.},
volume = {2},
number = {4},
pages = {384--409},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Efficient utilization of scratch-pad memory in embedded processor
applications Inproceedings European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997, pp. 7–11, 1997. Links | BibTeX @inproceedings{DBLP:conf/date/PandaDN97,
title = {Efficient utilization of scratch-pad memory in embedded processor
applications},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/EDTC.1997.582323},
doi = {10.1109/EDTC.1997.582323},
year = {1997},
date = {1997-01-01},
booktitle = {European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997},
pages = {7--11},
crossref = {DBLP:conf/date/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Jha, Pradip K; Dutt, Nikil D Library mapping for memories Inproceedings European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997, pp. 288–292, 1997. Links | BibTeX @inproceedings{DBLP:conf/date/JhaD97,
title = {Library mapping for memories},
author = {Pradip K Jha and Nikil D Dutt},
url = {https://doi.org/10.1109/EDTC.1997.582372},
doi = {10.1109/EDTC.1997.582372},
year = {1997},
date = {1997-01-01},
booktitle = {European Design and Test Conference, ED&TC '97, Paris, France,
17-20 March 1997},
pages = {288--292},
crossref = {DBLP:conf/date/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Panda, Preeti Ranjan; Dutt, Nikil D; Nicolau, Alexandru Exploiting off-chip memory access modes in high-level synthesis Inproceedings Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 333–340, 1997. Links | BibTeX @inproceedings{DBLP:conf/iccad/PandaDN97,
title = {Exploiting off-chip memory access modes in high-level synthesis},
author = {Preeti Ranjan Panda and Nikil D Dutt and Alexandru Nicolau},
url = {https://doi.org/10.1109/ICCAD.1997.643539},
doi = {10.1109/ICCAD.1997.643539},
year = {1997},
date = {1997-01-01},
booktitle = {Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided
Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997},
pages = {333--340},
crossref = {DBLP:conf/iccad/1997},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|